Architect

Posted 5 Days Ago
Be an Early Applicant
Palo Alto, CA, USA
Hybrid
160K-280K Annually
Senior level
Artificial Intelligence • Hardware • Semiconductor
Stronger Network. Faster Inference.
The Role
Define and guide architecture for high-performance ASICs supporting AI accelerators, networking, and data center workloads. Develop architectural and micro-architectural specifications, model performance, optimize power, performance, and area, and lead trade-off studies and design reviews. Collaborate with RTL, verification, physical design, firmware, and software teams while defining power-management strategies and mentoring engineers.
Summary Generated by Built In
ASIC Architect

We are seeking a highly skilled and visionary ASIC Architect to define, architect, and guide the development of next-generation, high-performance ASICs. As a key technical leader, you will translate high-level system requirements into detailed architectural specifications, balancing power, performance, and area (PPA) trade-offs.

Who we are:

We are a startup building foundational technology to address performance, scalability, and resiliency challenges in large-scale AI data center clusters. We are backed by top-tier VC firms and notable angel investors.

The company is led by experienced builders and operators who have founded companies, taken them to scale, and exited successfully. We work with a strong sense of unity and shared responsibility, and we expect trust, integrity, and respect in how we collaborate and make decisions. We hold ourselves accountable to one another and to the quality of the work we deliver.

Headquartered in Silicon Valley, we operate across a mix of remote and on-site locations in the U.S. and Canada. We aim to create an environment where people are treated fairly, supported in their growth, and are empowered to do meaningful work alongside others who take the craft seriously.

 

What we need:

We are seeking a highly skilled and visionary ASIC Architect to define, architect, and guide the development of next-generation, high-performance ASICs. As a key technical leader, you will translate high-level system requirements into detailed architectural specifications, balancing power, performance, and area (PPA) trade-offs.

You will work across teams to define the architecture for IP blocks, sub-systems, and full SoC integration for advanced AI accelerators, networking, and datacenter computing workloads.

 

Key Responsibilities:

  • Lead the creation of Architectural Design Specifications (ADS) and Micro-architecture Specifications (MAS) for complex ASICs including high-speed interconnect fabric and IO protocols (Ethernet, PCIe, UCIe).

  • Develop high-level performance models (using SystemC/TLM, C++, or Python) to analyze workload behaviors and validate architectural assumptions.

  • Optimize chip-level and block-level architecture to meet stringent power, performance, and area goals.

  • Partner with RTL design, verification, physical design, firmware, and software teams to ensure seamless implementation and validation.

  • Drive architectural trade-off studies and lead design reviews.

  • Define advanced power management strategies including DVFS, power domains, and clock gating.

  • Mentor junior engineers and contribute to technical leadership across the organization.

 

Required Skills and Qualifications:

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science

  • 7+ years of experience in ASIC architecture, micro-architecture, or high-level design.

  • Strong proficiency in SystemVerilog/Verilog and C/C++ or SystemC for modeling.

  • Deep knowledge of computer architecture, including CPU/GPU cores, caches, fabric, and memory hierarchies.

  • Experience with industry-standard protocols such as Ethernet, PCIe or UAL.

  • Familiarity with EDA tools such as Synopsys Design Compiler, Cadence Genus, or similar.

  • Experience with performance modeling and analysis tools.

 

Desired Skills:

  • Master’s degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.

  • Experience designing AI/ML accelerators or high-performance networking silicon.

  • Proven record of shipping high-performance silicon from concept to tape-out.

  • Familiarity with pre-silicon emulation platforms.

  • Strong scripting skills (Python, Tcl, Perl) for automation.

  • Excellent communication skills and ability to articulate complex architectural concepts.

  • Proactive problem solver capable of working with minimal oversight.

  • Strong leadership and mentorship capabilities

Compensation:

Target base salary for this role is $160,000 - $280,000 per year + meaningful equity + benefits + 401k. Our salary ranges are determined by role, level, experience, and location.

 

Agency Note:

We do not accept resumes from agencies or search firms. Please do not forward candidate profiles through our careers page, email, LinkedIn messages, or directly to company employees. Any resumes submitted will be deemed the property of the company, and no fees will be paid in the event the candidate is hired.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
  • 7+ years of experience in ASIC architecture, micro-architecture, or high-level design
  • Strong proficiency in SystemVerilog or Verilog
  • Proficiency in C, C++, or SystemC for modeling
  • Deep knowledge of computer architecture, including CPU/GPU cores, caches, fabrics, and memory hierarchies
  • Experience with industry-standard protocols such as Ethernet, PCIe, or UAL
  • Familiarity with EDA tools such as Synopsys Design Compiler, Cadence Genus, or similar
  • Experience with performance modeling and analysis tools
  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science
  • Experience designing AI/ML accelerators or high-performance networking silicon
  • Record of shipping high-performance silicon from concept to tape-out
  • Familiarity with pre-silicon emulation platforms
  • Strong scripting skills in Python, Tcl, or Perl
  • Excellent communication skills and ability to articulate complex architectural concepts
  • Proactive problem-solving ability with minimal oversight
  • Leadership and mentorship capabilities
Am I A Good Fit?
beta
Get Personalized Job Insights.
Our AI-powered fit analysis compares your resume with a job listing so you know if your skills & experience align.

The Company
HQ: Palo Alto, CA
50 Employees
Year Founded: 2025

What We Do

We are a mixture of software, system, and silicon experts using AI every day to deliver the world's most capable and responsive intelligence.

Why Work With Us

We are a mixture of software, system, and silicon experts using AI every day to deliver the world's most capable and responsive intelligence. We start from the workload. Scaling inference is less about brute force and more about how compute is distributed and memory is interc

Similar Jobs

Zscaler Logo Zscaler

Architect

Cloud • Information Technology • Security • Software • Cybersecurity
Easy Apply
Hybrid
Santa Clara, CA, USA
8697 Employees
248K-310K Annually

Hewlett Packard Enterprise Logo Hewlett Packard Enterprise

Architect

Artificial Intelligence • Cloud • Information Technology • Consulting
In-Office or Remote
3 Locations
85422 Employees
125K-294K Annually

PwC Logo PwC

Architect

Artificial Intelligence • Professional Services • Business Intelligence • Consulting • Cybersecurity • Generative AI
Hybrid
67 Locations
370000 Employees
99K-232K Annually

Hewlett Packard Enterprise Logo Hewlett Packard Enterprise

Architect

Artificial Intelligence • Cloud • Information Technology • Consulting
In-Office or Remote
2 Locations
85422 Employees
172K-355K Annually

Similar Companies Hiring

Unusual Machines, Inc. Thumbnail
Hardware • Robotics
Orlando, FL
300 Employees
Blee Thumbnail
Artificial Intelligence • Marketing Tech • Software
New York, New York
33 Employees
Vega Thumbnail
Artificial Intelligence • Automotive • Insurance • Transportation
US
65 Employees

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account