Analog/Mixed Signal IC Design Intern (Summer 2025)

Sorry, this job was removed at 03:08 p.m. (UTC) on Thursday, May 08, 2025
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San Jose, CA, USA
In-Office
Cloud • Hardware • Software • Semiconductor
The Role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Cadence Silicon Solutions Group (SSG) develops industry-leading Digital IP (Intellectual Property), from RISC-V processor cores to DSPs to Memory Controllers and IO solutions. Our configurable and extensible IP solutions are poised to meet the demands of next-generation applications such as intelligent IoT Devices and ML/AI edge inference. Essentially, all leading semiconductor providers can be counted as Cadence customers.  

 
The Cadence SSG Team is hiring students to join our R&D teams in San Jose or Austin. This is an amazing opportunity to work at a world leader in computational software, semiconductor design IP, and system verification hardware.  Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare. 
 

We aim to make you an integral part of the team by providing training, mentorship, and encouragement of your creative talents. Our goal is to equip students with practical work experience. We understand that it is best to learn by doing. We will provide tasks that enable you to learn while making meaningful technical contributions.  

Come be part of this great SSG Team where your contributions can make a visible impact. Your work will be integral to our success and the advancement of our industry.   
 

Description:

  • The student Intern will work with a talented team developing a wide range of wireline transceivers to enable fast Chiplet communication. The intern will work with the analog design team to optimize the PPA to enable next generation of IP’s.
  • The Intern will get an opportunity to work on designing IP’s on one of the cutting-edge foundry technology nodes to deliver the best-in-class PPA per technology node.
  • This position will give the intern the opportunity to get experience with tools, skills, insights, and tradeoffs which are fundamental for successful IC design.

Position Requirements:

The student intern should have completed foundational coursework in Analog/Mixed signal IC design. Experience with Virtuoso design tools including Schematics, ADE, and Layout is expected. The intern should be able to conduct research/literature review of the state-of-the-art and suggests innovative approach to the existing problems. Proficiency in one or more programming languages (Matlab, Octave, Python, VerilogA) is a plus.

  • Currently enrolled in MSEE or equivalent
  • Background in Analog/Mixed signal design
  • Experience with high-speed designs (> 2 GHz)
  • Basic knowledge on wireline transceivers
  • Strong communication skills
  • Scripting language experience a plus

Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success.

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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