Analog/Mixed Signal IC Design Engineer (Principal/Staff)

Posted 18 Days Ago
Be an Early Applicant
Hiring Remotely in Yishun, SGP
Remote
Expert/Leader
Software • Semiconductor • Manufacturing
The Role
Design and verify high-speed analog/mixed-signal IPs (SerDes, HBM, UCIe, PLL) for advanced CMOS nodes. Develop schematics, perform pre/post-layout verification and simulations (Cadence Virtuoso/Spectre), optimize low-jitter/low-power circuits, support layout reviews, assist IP integration into SoCs, and aid silicon bring-up, debug, and characterization.
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Job Description:

Job Description

Analog/Mixed Signal IC Design Engineer:

This position is part of a highly skilled multi-geographical team tasked with the development of high speed analog, mixed-signal IPs covering HBM, UCIe, and many others areas using the latest A14, 2nm and 3nm CMOS technology. The team will be developing  key differentiating IPs used in the Artificial Intelligence, Machine Learning, High Performance Computing and Hyper-Scale Data Center markets. Each member of the team is expected to be committed to the team success, create new innovation, and ensure customer usage satisfaction with first time right quality mindset.

Responsibilities: 

Design, pre-layout and post-layout verification of circuits to be used as part of state-of-the-art integrated circuits including:

  • High speed mixed-signal design
  • High speed clock distribution networks
  • High speed RX & TX s design

This role involves

  • Developing circuit schematics, performing detailed layout reviews and performing all necessary verification/simulations.
  • Optimizing circuits in high speed paths for low jitter and low power.
  • Conducting design reviews and creating slides and other associated documentation.
  • Assisting IP integration into SOCs
  • Providing guidance to validation engineers or be involve in initial silicon bring-up, debug, and characterization

Knowledge and Experience:  

  • The position requires extensive experience with designing high-speed custom analog and digital circuits in area(s) like Serdes, HBM, UCIe and PLL.
  • The candidate should be extremely familiar with the use of the Cadence Virtuoso tool suite to design and verify high-speed custom circuits, including
    • Virtuoso schematic capture and layout & Spectre circuit simulator.
    • Virtuoso Analog Design Environment (ADE) – Explorer, Assembler, etc.
  • Design experience in advanced CMOS nodes is required; FinFET design experience is a plus.
  • The ideal candidate will have wide-ranging experience, with a demonstrated ability to rely on both thorough understanding of engineering fundamentals and design creativity to solve circuit design problems.
  • Candidate with the follow ability will be advantages:
    • Demonstrated ability to clearly present their work to other circuit designers and to non-experts as well.
    • Ability to perform matlab, AMI or 3D modeling of their highspeed design.
    • Good knowledge of industry standard interface specification and show the ability to explain/reason on the high speed design definition(s).

Education:

  • Bachelor/Master/PhD in Electrical/Electronic Engineering with 10+ years of related experience is preferred.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • Experience designing high-speed custom analog and digital circuits (SerDes, HBM, UCIe, PLL)
  • Proficiency with Cadence Virtuoso schematic capture and layout
  • Experience using Spectre circuit simulator
  • Experience with Virtuoso Analog Design Environment (ADE Explorer, Assembler)
  • Design experience in advanced CMOS nodes
  • FinFET design experience
  • Ability to perform MATLAB, AMI or 3D modeling of high-speed designs
  • Good knowledge of industry standard interface specifications and ability to reason on high-speed design definitions
  • Bachelor/Master/PhD in Electrical/Electronic Engineering
  • 10+ years of related experience

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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