Analog & Mixed-Signal Design Engineer (3 to 5 years of experience)

Posted 4 Days Ago
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Bengaluru, Bengaluru Urban, Karnataka, IND
In-Office
Mid level
Hardware • Information Technology • Semiconductor • Manufacturing
The Role
Design and implement IO solutions for next-generation SoCs in advanced CMOS nodes. Work on IO IP (SSTL, LVDS, I2C, POD, HV-tolerant, crystal oscillators), DDR4 TX/RX architectures, PVT calibration and FinFET/16nm DSM issues. Collaborate in technical reviews, run simulations (Hspice/Spectre/FineSim, mixed-mode co-simulation), and contribute EDA models (Verilog/Liberty) and innovative design methodologies.
Summary Generated by Built In
Company Description

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.

Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Job Description

Will be part of team responsible for IO solutions for next generation SOCs in advanced CMOS technology nodes. Will work on IO solutions for SanDisk ASIC controllers under guidance of senior team members to meet the specifications and product requirements

Work closely with team and actively participate in technical discussions and reviews. Handle assigned tasks independently Pro-actively get design issues/problems solved. Contribute to or propose innovative design solutions and design methodologies.

Should have knowledge in IPs such as SSTL, LVDS, I2C, POD IOs, PVT calibration, HV tolerant and Fail-safe IOs, Crystal oscillator etc.  Knowledge or relevant courses completed in TX and RX design architectures for high speed applications such as DDR4.

Added advantage to have is good understanding of ESD phenomenon, familiarity in ESD circuits design and associated ESD guidelines.

Conversant with tools such as Cadence Virtuoso/Synopsys custom compiler/Hspice/Spectre/Finesim including statistical simulation methodologies.

Experience in Mixed-mode simulation and analog/digital co-simulation will be of added advantage.

Experience in creating EDA model such as Verilog model, Liberty etc will be of added advantage.

Should have deep understanding and working knowledge of CMOS process including FINFET technologies such as 16nm and the associated DSM issues. 

Qualifications

  • Masters degree in Electronics & Telecommunication/Electrical engineering.
  • Very analytical in nature and able to work in a multi-disciplinary environment.
  • Creative, out-of-the-box thinker with a high level of personal involvement 
  • Strong theoretical background with a pragmatic approach.
  • Good verbal and written communication skills and experience working with different geographies.
  • Good documentation and presentation skills
  • High level of integrity and commitment to quality and timeliness.

Additional Information

All your information will be kept confidential according to EEO guidelines.

Skills Required

  • 3-5 years of experience in analog and mixed-signal IC design
  • Masters degree in Electronics & Telecommunication or Electrical Engineering
  • Knowledge of IO IPs: SSTL, LVDS, I2C, POD IOs, PVT calibration, HV-tolerant and fail-safe IOs, crystal oscillators
  • Knowledge or coursework in TX/RX design architectures for high-speed interfaces such as DDR4
  • Proficiency with Cadence Virtuoso, Synopsys Custom Compiler, Hspice, Spectre, FineSim and statistical simulation methodologies
  • Deep understanding and working knowledge of CMOS process and FinFET technologies (e.g., 16nm) and DSM issues
  • Good verbal and written communication, documentation and presentation skills; ability to work across geographies
  • Understanding of ESD phenomenon and ESD circuit design and guidelines
  • Experience with mixed-mode simulation and analog/digital co-simulation
  • Experience creating EDA models such as Verilog models and Liberty files

Sandisk Corporation Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Sandisk Corporation and has not been reviewed or approved by Sandisk Corporation.

  • Fair & Transparent Compensation Pay is considered competitive across many roles, with compensation often described as fair for the work. Technical roles are characterized as aligned with market expectations in semiconductor and storage.
  • Healthcare Strength The official program highlights comprehensive medical, dental, and vision coverage with wellness and caregiving support. Employer-verified materials describe a generally strong U.S. health benefits package.
  • Retirement Support A 401(k) plan with company match is explicitly called out and positioned as a core benefit. Retirement and savings options are emphasized as part of a well-rounded total rewards offering.

Sandisk Corporation Insights

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The Company
HQ: Milpitas, CA
11,000 Employees
Year Founded: 1988

What We Do

Sandisk is a leading developer, manufacturer, and provider of data storage devices and solutions based on NAND flash technology, including memory cards, USB flash drives, and solid-state drives (SSDs).

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