Analog and Mixed-Signal Modelling Architect (Masters or PhD New Grad)

Posted 17 Days Ago
Be an Early Applicant
Ottawa, ON, CAN
In-Office
71K-142K Annually
Entry level
Cloud • Hardware • Internet of Things • Other • Software • Utilities
Ciena is a networking systems, services, and software company.
The Role
Design and validate analog and mixed-signal behavioral models for high-speed coherent optical modems. Develop C++ and SystemC models integrated with Python and MATLAB simulations, firmware flows, and lab validation. Model PLLs, clocking systems, filters, DACs, ADCs, and SerDes while supporting ASIC bring-up, silicon characterization, system architecture, documentation, and cross-functional collaboration.
Summary Generated by Built In

As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era. We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration. Through development opportunities, meaningful work, and flexibility, Ciena supports growth and well-being—on and off the job. Connect with a career that matters.


We are seeking a Analog & Mixed-Signal Modelling Architect – New Grad to join our DSP team. In this role, you will drive the design, modeling, and system-level validation of analog and mixed-signal subsystems for next-generation high-speed coherent optical modems.


This position emphasizes behavioral modeling using C++ and SystemC, tightly integrated with Python and MATLAB-based system simulations, firmware bring-up flows, and lab validation. You will operate at the intersection of analog-/digital-hardware, DSP, firmware, and electro-optical subsystems - contributing architectural decisions from early concept through silicon bring-up and product deployment.


How you will make an impact:

  • Define and review system-level analog and mixed-signal functions for coherent optical modems.
  • Develop behavioral models of analog and mixed-signal blocks using C++ and SystemC, emphasizing firmware register-map interfaces, control, observability, and execution speed.
  • Apply C++/ SystemC-AMS to model continuous-time and mixed-signal behavior of PLLs, clocking systems, filters, DACs, ADCs, SerDes, and related subsystems.
  • Build and maintain C++ and Python/MATLAB-based verification flows, including C++ MEX wrappers for system simulation environments.
  • Collaborate with analog, digital, DSP, firmware, and lab teams to align models, specifications, and validation plans.
  • Support ASIC lab bring‑up and characterization, correlating silicon and lab data with behavioral models and system simulations.
  • Plan design activities and create design guidelines, implementation documentation, and setup guides in Confluence.

The must haves:

  • Education: Post-graduate degree in Physics or Engineering with a focus on ASIC hardware, communication systems, and/or control systems.
  • Experience: Previous internship, co-op, or applied project experience relevant to the role.
  • Understanding of analog and mixed-signal processing in high-speed communication systems.
  • Experience writing C++ and/or SystemC behavioral models for hardware-adjacent systems.
  • Demonstrated ability to operate at the system-architecture level while remaining grounded in real analog behavior and physical impairments.
  • Knowledge of analog impairments, including noise, distortion, non-linearity, bandwidth limitations, jitter, and phase noise, and their impact on modem-level performance.
  • Strong intuition for analog-digital partitioning, power-performance trade-offs, and calibration strategies.
  • Comfortable working in a Linux-based development environment, using Git and modern collaborative workflows.
  • Clear technical communication skills and the ability to work effectively across disciplines.
  • Experience with the following tools: C++, SystemC-AMS, Python, MATLAB, Simulink, Cadence Virtuoso, Cadence AMS Designer, Xcelium AMS

The annual salary range for a Masters New Grad is $70,700 - $112,900

The annual salary range for PhD New Grads is $89,000 - $142,200


Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.
At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.  Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Skills Required

  • Postgraduate degree in Physics or Engineering focused on ASIC hardware, communication systems, and/or control systems
  • Previous relevant internship, co-op, or applied project experience
  • Understanding of analog and mixed-signal processing in high-speed communication systems
  • Experience writing C++ and/or SystemC behavioral models for hardware-adjacent systems
  • Ability to work at the system-architecture level while understanding analog behavior and physical impairments
  • Knowledge of analog impairments including noise, distortion, non-linearity, bandwidth limitations, jitter, and phase noise
  • Understanding of analog-digital partitioning, power-performance trade-offs, and calibration strategies
  • Comfort working in a Linux-based development environment with Git and modern collaborative workflows
  • Clear technical communication and ability to work effectively across disciplines
  • Experience with C++, SystemC-AMS, Python, MATLAB, Simulink, Cadence Virtuoso, Cadence AMS Designer, and Xcelium AMS

Ciena Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Ciena and has not been reviewed or approved by Ciena.

  • Fair & Transparent Compensation — Pay is often characterized as competitive or above-market in certain roles and regions, with references to market-aligned salary ranges and transparency around pay bands.
  • Healthcare Strength — Health coverage is frequently framed as comprehensive, including medical, dental, and vision, with indications that coverage can extend to dependents and is viewed as a meaningful component of total rewards.
  • Leave & Time Off Breadth — Time-off offerings are described as flexible and generous, including Flex/uncapped PTO in many cases and additional paid time for volunteering.

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The Company
HQ: Hanover, MD
9,561 Employees
Year Founded: 1992

What We Do

Ciena (NYSE: CIEN) is a global leader in networking systems, services, and software. We build the world’s most adaptive networks to enable our customers to deliver richer, more connected experiences for all users. At our core, Ciena is a company rooted in people. We prioritize deep, collaborative relationships within our teams and alongside our customers, partners, and communities around the world. For three-plus decades, we’ve brought our humanity to our relentless pursuit of innovation. We continue to lead the evolution of networking with a strong track record of industry firsts. As end-user expectations skyrocket, our customers and their networks must transform. Ciena powers this transformation by driving next-generation solutions built for maximum openness and agility—today and into the future. Corporate/Brand Values: • Customer First • Integrity • Velocity • Innovation • Outstanding People We're the perfect size for you to make an impact. W Only Ciena has the depth of expertise and the culture of collaboration and partnership required to help our partners evolve. We do this by strategically integrating hardware, services, and software in an open environment to ensure our clients’ networks are ‘fit for flexibility’ today and into the f

Why Work With Us

We are known for our industry-firsts, including the first coherent optical solution, converged packet-optical platform, and intelligence automation platform. Our commitment extends beyond innovation, logging in over 35,000 volunteer hours and $2 million to worthy causes in 2023. We're the perfect size and culture for you to make a difference.

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