Analog and Mixed Signal Design Engineer

Posted 11 Days Ago
Be an Early Applicant
2 Locations
In-Office
110K-176K Annually
Senior level
Software • Semiconductor • Manufacturing
The Role
Design and verify analog and mixed-signal IP, including bandgaps, ADCs, DACs, regulators, comparators, and GPIOs. Oversee layout and post-layout SPICE validation, develop Verilog behavioral and gate-level models, deliver EDA views and technical documentation, and guide silicon bring-up and validation. Analyze test data, support laboratory testing, and troubleshoot silicon failures while collaborating across advanced process technologies.
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Job Description:

Role Overview
 

Broadcom’s Central Engineering Group is seeking an experienced Mixed-Signal Analog Design Engineer to join our world-class team. In this position, you will design advanced on-die Process, Voltage, and Temperature (PVT) monitoring IP. You will work across a wide range of cutting-edge technologies, including the industry's most advanced process nodes and applications.

Responsibilities

  • Circuit Design & Verification: Design schematic architectures for analog and mixed-signal blocks, including bandgaps, ADCs, DACs, voltage regulators, comparators, and GPIOs.
  • Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE simulations to ensure silicon success.
  • Digital Modeling: Build behavioral and gate-level models for IPs and validate functionality through Verilog simulations.
  • IP Delivery & Documentation: Create standard EDA tool views (including timing models), and author comprehensive datasheets and technical integration documents.
  • Silicon Bring-up & Validation: Establish post-silicon testing guidelines and oversee the validation process by analyzing and reviewing test data.
     

Education & Experience

  • MS or PhD in Electrical Engineering
  • 6+ years of mixed-signal and analog design experience.
     

Design Expertise

  • Deep knowledge of core analog concepts including gain, bandwidth, stability, device physics, circuit reliability, process variation, and the statistical analysis of Monte Carlo simulation results.
  • Strong understanding of layout effects on circuit performance.
  • Familiarity with Verilog modeling, digital circuits, and standard digital implementation flows.
     

EDA Tools

  • Proficiency with Cadence Virtuoso and simulation platforms like Spectre, HSPICE, or PrimeSim.
  • Experience with Synopsys PrimeTime and Verilog simulators such as Xcelium or VCS.
     

Professional Attributes

  • Excellent communication and teamwork skills.
  • Proven ability to independently navigate complex, new, or unfamiliar engineering challenges.
     

Desired Skills

  • Prior experience building and delivering mixed-signal IPs.
  • General familiarity with laboratory testing methodologies and common bench equipment to effectively guide lab teams.
  • Proficiency in scripting languages (Python, Perl, SKILL) to automate design and verification tasks.
  • Familiarity with ESD (Electrostatic Discharge) and latch-up design rules.
  • Silicon Failure Analysis (FA) and debugging skills.

Compensation and Benefits


The annual base salary range for this position is USD 109,700.00 To USD 175,500.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • MS or PhD in Electrical Engineering
  • 6+ years of mixed-signal and analog design experience
  • Deep knowledge of analog concepts, including gain, bandwidth, stability, device physics, circuit reliability, process variation, and Monte Carlo analysis
  • Strong understanding of layout effects on circuit performance
  • Familiarity with Verilog modeling, digital circuits, and standard digital implementation flows
  • Proficiency with Cadence Virtuoso and analog simulation platforms such as Spectre, HSPICE, or PrimeSim
  • Experience with Synopsys PrimeTime and Verilog simulators such as Xcelium or VCS
  • Excellent communication and teamwork skills
  • Ability to independently navigate complex, new, or unfamiliar engineering challenges
  • Prior experience building and delivering mixed-signal IPs
  • Familiarity with laboratory testing methodologies and common bench equipment
  • Proficiency in Python, Perl, or SKILL scripting
  • Familiarity with ESD and latch-up design rules
  • Silicon failure analysis and debugging skills

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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