NMOS Transistors and PMOS Transistors Explained

Microprocessors are built out of transistors. In particular, they are constructed out of metal-oxide semiconductor (MOS) transistors. There are two types of MOS transistors — positive-MOS (pMOS) and negative-MOS (nMOS). Every pMOS and nMOS comes equipped with three main components — the gate, the source and the drain.

To understand how a pMOS and an nMOS operate, you need to know a couple key terms:

• Closed circuit: This means that the electricity is flowing from the gate to the source.
• Open circuit: This means the electricity is not flowing from the gate to the source; rather, electricity is flowing from the gate to the drain.

How Does an NMOS Transistor Work?

When an nMOS transistor receives a non-negligible voltage, the connection from the source to the drain acts as a wire. Electricity will flow from the source to the drain uninhibited. This is referred to as a closed circuit. On the other hand, when an nMOS transistor receives a voltage at around 0 volts, the connection from the source to the drain will be broken, which is referred to as an open circuit.

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How Does a PMOS Transistor Work?

The p-type transistor works counter to the n-type transistor. Whereas the nMOS will form a closed circuit with the source when the voltage is non-negligible, the pMOS will form an open circuit with the source when the voltage is non-negligible.

As you can see in the image of the pMOS transistor shown below, the only difference between a pMOS transistor and an nMOS transistor is the little circle between the gate and the first bar. This circle inverts the value from the voltage. If the gate sends a voltage representative of a value of 1, then the inverter will change the 1 to a 0 and cause the circuit to function accordingly.

The pMOS and nMOS transistors function in an opposite, complementary manner. So when we combine the both of them into one giant MOS circuit, it becomes a complementary metal-oxide semiconductor (cMOS circuit).

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Constructing NMOS and PMOS Transistor Gates 

We can combine pMOS and nMOS circuits in order to build more complex structures called gates. More specifically, we’ll want to build logic gates. 

We can attach a pMOS transistor that connects to the source and an nMOS transistor that connects to the ground. This will be our first example of a cMOS transistor.

This cMOS transistor acts in a similar manner to the NOT logical function.

Let’s take a look at the NOT truth table:

In the NOT truth table, every “input value: A” is inverted. What happens with the circuit above?

Well, let’s imagine the input is a 0.

The 0 comes in and goes both up and down the wire to the pMOS (top) and the nMOS (bottom). When the value 0 reaches the pMOS, it gets inverted to a 1. So, the connection to the source is closed. This will produce a logical value of 1 as long as the connection to the ground (drain) isn’t also closed. Since the transistors are complementary, we know that the nMOS transistor won’t invert the value, so it takes the value 0 as is and will therefore create an open circuit to the ground (drain). Thus, a logical value of 1 is produced for the gate.

What happens if a 1 is the IN value? Well, following the same steps as above, the value 1 gets sent to both the pMOS and the nMOS. When the value is received by the pMOS, the value gets inverted to a 0. Thus, the connection to the source is open. When the nMOS receives the value, the value does not get inverted. Thus, the value remains a 1. When a value of 1 is received by the nMOS, the connection is closed. So, the connection to the ground is closed. This will produce a logical value of 0.

Putting the two sets of input/output together yields:

It’s quite easy to see that this truth table is the exact same as that which the logical function NOT produces. As a result, this is known as a NOT gate.

Can we use these two simple transistors to make more complicated structures? Absolutely. Next, we will build a NOT-OR (NOR) gate and an OR gate.

Building a ‘NOT-OR’ Gate With NMOS and PMOS Transistors

This circuit uses two pMOS transistors at the top and two nMOS transistors at the bottom. Again, let’s look at the input to the gate to see how it behaves.

When “A” is 0 and “B” is 0, this gate will invert both the values to a 1 when they reach the pMOS transistors. However, the nMOS transistors will both maintain the value of 0. This will lead the gate to produce a value of 1.

When “A” is 0 and “B”  is 1, this gate will invert both the values when they reach the pMOS transistors. So, “A” will change to 1 and “B” will change to 0. This will not lead to the source because both of the transistors require a closed circuit in order to connect the input to the source. The nMOS transistors do not invert the values. So, the nMOS associated with “A” will produce a 0, and the nMOS associated with “B” will produce a 1. Thus, the nMOS associated with “B” will produce a closed circuit to the ground. This will lead the gate to produce a value of 0.

When “A” is 1 and “B” is 0, this gate will invert both the values when they reach the pMOS transistors. So, “A” will change to 0 and “B” will change to 1. This will not lead to the source since both of the transistors require a closed-circuit in order to connect the input to the source. The nMOS transistors do not invert the values. So, the nMOS associated with “A” will produce a 1, and the nMOS associated with “B” will produce a 0. Thus, the nMOS associated with “A” will produce a closed circuit to the ground. This will lead the gate to produce a value of 0.

When “A” is 1 and “B” is 1, this gate will invert both the values when they reach the pMOS transistors. So, “A” will change to 0 and “B” will change to 0. This will not lead to the source since both of the transistors require a closed circuit in order to connect the input to the source. The nMOS transistors do not invert the values; so, the nMOS associated with “A” will produce a 1, and the nMOS associated with “B” will produce a 1. Thus, the nMOS associated with “A” and the nMOS associated with “B” will produce a closed circuit to the ground. This will lead the gate to produce a value of 0.

Thus, the gate’s truth table is as follows:

Meanwhile, the NOR logical function’s truth table is as follows:

Thus, we have confirmed that this gate is a NOR gate because it shares its truth table with the NOR logical function.

Building an ‘OR’ Gate With NMOS and PMOS Transistors 

Now, we will put both of the gates that we have created together in order to produce an OR gate. Remember, NOR stands for NOT OR. So, if we invert an already inverted gate, we will get the original back. Let’s put this to the test to see it in action.

What we’ve done here is we’ve taken the NOR gate from before and applied a NOT gate to the output. As you can see above, the NOT gate will take a value of 1 and output a 0, and the NOT gate will take a value of 0 and output a 1.

This will take the values of the NOR gate and convert all of the 0’s to 1’s and 1’s to 0’s. Thus, the truth table will be as follows:

If you would like more practice testing these gates, feel free to try out the above values for yourself and see that the gate produces equivalent results.

Building a ‘NOT-AND’ Gate With NMOS and PMOS Transistors

I claim this is a NOT AND (NAND) gate, but let’s test this gate’s truth table to determine if it really is a NAND gate.

When “A” is 0 and “B” is 0, “A’s” pMOS will produce a 1, and “A’s” nMOS will produce a 0. Thus, this gate will produce a logical 1 since it is connected to the source with a closed circuit and disconnected from the ground with an open circuit.

When “A” is 0 and “B” is 1, “A’s” pMOS will produce a 1, and “A’s” nMOS will produce a 0. Thus, this gate will produce a logical 1 since it is connected to the source with a closed circuit and disconnected from the ground with an open circuit.

When “A” is 1 and “B” is 0, “B’s” pMOS will produce a 1, and “B’s” nMOS will produce a 0. Thus, this gate will produce a logical 1 since it is connected to the source with a closed circuit and disconnected from the ground with an open circuit.

When “A” is 1 and “B” is 1, “A’s” pMOS will produce a 0, and “A’s” nMOS will produce a 1. So, we must check “B’s” pMOS and nMOS, as well. “B’s” pMOS will produce a 0, and “B’s” nMOS will produce a 1. Thus, this gate will produce a logical 0 since it is disconnected from the source with an open circuit and connected to the ground with a closed circuit.

The truth table is as follows:

Meanwhile, the NAND logical function’s truth table is as follows:

Thus, we have verified that this is, indeed, a NAND gate.

Building an AND Gate With NMOS and PMOS Transistors

Now, how do we build an AND gate? Well, we will build an AND gate the exact same way we built an OR gate from a NOR gate. We will attach an inverter.

Since all we have done is applied a NOT function to a NAND gate’s output, the truth table will look like this:

Again, please verify to make sure that what I am telling you is true. Thus we’ve covered what pMOS and nMOS transistors are, as well as how to use them to build more complex structures.

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