Jobs at Silvaco Inc

Three-month internship to learn from experienced engineers and contribute to real analog/mixed-signal semiconductor projects. Interns will develop practical skills using industry design methodologies and tools. Requires basic analog design knowledge; shell scripting and Unix/Linux skills are desirable. Outstanding interns may be considered for full-time roles.

Lead Workday HCM configuration, integrations, and administration. Improve processes through automation, conduct audits and testing, build reports and dashboards, manage change, train users, document configurations, and partner cross-functionally to maintain data integrity and system performance.

Design and verify digital IP: write Verilog RTL, run synthesis and STA, develop verification environments (including FPGA and gate-level verification), perform CDC/RDC linting and formal checks, and support DFT and timing closure with physical design teams.

Three-month internship to learn digital verification using Verilog/SystemVerilog and UVM, contribute to real projects, work with coverage metrics and Unix/Linux tools, and gain exposure to RTL, synthesis, CDC analysis and scripting.

Three-month internship to learn from experienced engineers and contribute to real digital design projects. Work on Verilog RTL design/simulation, CDC/RDC techniques, ASIC/FPGA flows (RTL synthesis, place-and-route, timing sign-off), static timing analysis, and timing constraints (SDC) using industry tools and methodologies.

Lead micro-architecture specification, RTL design and verification of digital IPs. Manage and mentor teams, direct projects from spec to silicon, own schedules and risk, drive verification (UVM, SystemVerilog), perform FPGA-based hardware verification, engage customers, and define best practices to improve productivity and quality.

Three-month on-site internship to learn and contribute to custom analog IC layout projects. Interns will develop practical skills in industry-standard design methodologies, work with experienced engineers, and apply basic analog design and layout techniques. Strong emphasis on learning Shell scripting and Unix/Linux workflows; outstanding interns may be considered for full-time roles.

Design and implement system-level verification environments and UVM-based testbenches. Create constrained-random stimulus, monitors, scoreboards, and coverage models in SystemVerilog. Drive coverage closure, integrate VIPs, support FPGA prototyping and pre-silicon validation, run RTL/gate simulations, and contribute to regression, CI flows, and verification automation.

Lead architecture, circuit design, and delivery of embedded memory compilers (SRAM, ROM, RF, DPRAM). Manage a team, define technical roadmap, drive PPA optimization, presales/customer engagements, silicon validation, and set verification/signoff methodologies.

Manage accounts receivable including aging, collections, reconciliations, and month-end close. Support general accounting tasks: reconciliations, accruals, fixed asset tracking, intercompany entries, audit preparation, Concur report review, and process improvements. Generate reports and assist with ad hoc analyses.

Lead Workday configuration, integrations, and HRIS operations. Translate business needs into system requirements, build integrations and reports, perform audits, manage change, train users, and maintain data integrity while partnering cross-functionally to scale HR systems.

Lead architecture, circuit design, and silicon validation of embedded memory compilers (SRAM, ROM, 1PRF/2PRF, DPRAM). Drive PPA, reliability, verification/signoff, team growth, presales/customer technical engagement, benchmarking, and foundry interaction across multiple process nodes and compiler variants.

Provide full-cycle HR generalist support for EMEA from Kyiv: advise managers, administer policies, manage performance and compensation processes, maintain HRIS and records, ensure legal compliance, support employee relations and HR projects.

Lead hands-on layout design, verification, and optimization for advanced memory IPs. Own floorplanning, placement, routing, signoff, troubleshooting, automation scripting, technical reviews, and collaborate with CAD and process teams to deliver high-quality layouts.

Lead end-to-end design, tapeout, bring-up, and silicon validation of test chips to characterize and qualify standard cell libraries and memory compilers. Define architecture, implement physical design, develop ATE/bench test programs, run silicon bring-up, analyze measurements versus models, author silicon reports, and coordinate cross-functional stakeholders and foundries.

Lead end-to-end design, tapeout, and silicon validation of test chips for standard cell libraries and memory compilers. Define architecture and on-chip test structures, perform full physical implementation and signoff, develop ATE/bench test programs and DFT, lead silicon bring-up and debugging, analyze silicon vs pre-silicon models, author silicon reports, and manage schedule, budget, and stakeholders.

Develop, test, and maintain TCAD simulation software and a library of linear solvers. Improve numerical methods for PDEs, implement CPU/GPU parallelism (threads, MPI, CUDA), and document and present results while collaborating within a software team.