Jobs at Roguebeam

Develop embedded firmware and Linux software for phased-array communications and radar systems. Build MCU-FPGA interfaces, device drivers, control and telemetry features, calibration tools, and automated test software. Bring up hardware in the lab using debugging and measurement equipment, collaborate with RF, FPGA, DSP, and hardware engineers, and help establish software development practices including code review, CI, version control, and documentation.

Own full-cycle recruiting for technical and non-technical roles, including sourcing, screening, coordination, offers, and closing. Build recruiting processes, implement an ATS, develop specialized engineering talent pipelines, partner with hiring managers, manage candidate communications, track recruiting metrics, coordinate agencies, support compensation benchmarking, and assist with onboarding. The role is on-site in the Seattle area and may involve export-controlled information.

Own synthesis, SDC constraints, and static timing sign-off for phased-array ASIC and FPGA designs. Drive multi-mode, multi-corner timing closure, ECOs, formal verification, and collaboration with RTL, DSP, DFT, and physical design teams. Support floorplanning, timing budgets, lab bring-up, technical strategy, documentation, and mentoring for high-performance beamforming and adaptive data paths.

Own the architecture, RTL implementation, synthesis, timing strategy, validation, and bring-up of digital subsystems for phased-array products. Lead beamformer control, interfaces, calibration, datapaths, verification methodology, and technical risk management from architecture through silicon or FPGA validation. Establish design standards, mentor RTL engineers, collaborate with RFIC, antenna, and DSP teams, and contribute to technical strategy, customer discussions, and hiring.

Owns block- and chip-level ASIC physical design from netlist through GDS, including floorplanning, power planning, placement, CTS, routing, timing closure, physical verification, EM/IR sign-off, ECOs, and FPGA P&R support. Collaborates with RTL, synthesis, STA, and DFT teams, integrates memories and interfaces, supports validation, and contributes to technical strategy and mentoring for phased-array products.

Owns end-to-end Design-for-Test architecture and implementation for phased-array ASIC and FPGA products, including scan, compression, MBIST, LBIST, JTAG, ATPG, gate-level verification, timing constraints, silicon bring-up, and ATE validation. Partners across RTL, synthesis, physical design, and test engineering to improve coverage, yield, test cost, and product quality. Automates DFT flows, supports diagnosis, and mentors team members.

Own digital RTL design for phased-array systems, including beamformer control, calibration logic, interfaces, and high-speed data paths. Drive designs from architecture through synthesis, timing closure, place-and-route support, and ASIC or FPGA validation. Perform simulation, lint, CDC analysis, and verification collaboration. Partner with RFIC, antenna, and DSP teams, support lab bring-up, improve design methodology, review peer designs, and mentor junior engineers.

Design and lead complex multilayer RF, mixed-signal, and phased-array PCB layouts for satellite, HAPS/NTN, and defense applications. Responsibilities include impedance and phase matching, signal and power integrity, stackup and constraint development, DFM/DFA/DFT reviews, fabrication documentation, and vendor coordination. The role collaborates closely with antenna, RF, thermal, mechanical, and systems engineers to deliver manufacturable high-frequency board designs.

Design RF and microwave systems for phased arrays, communications, and radar applications from architecture through production. Responsibilities include system modeling, link and line-up budgets, RF circuit and module design, simulations, characterization data analysis, and design iteration. The role collaborates with RFIC, antenna, digital, DSP, mechanical, thermal, and PCB teams to meet performance, packaging, thermal, grounding, and signal-integrity requirements.

Design RFIC beamformers and RF/mm-wave building blocks from architecture through tape-out and silicon validation. Perform circuit and system simulations, collaborate with antenna, digital, and DSP teams, and support laboratory characterization, debugging, and design iteration. Contribute to design reviews, documentation, and technical direction for phased-array communications and radar systems.

Lead RFIC beamformer and RF/mm-wave circuit design from architecture through schematic, layout, tape-out, and silicon validation. Design components including phase shifters, attenuators, LNAs, PAs, mixers, and switches. Perform circuit and system simulations, collaborate with antenna, digital, and DSP teams, support lab characterization, make architecture trade-offs, mentor engineers, and establish design methodologies and technical standards.

Lead the architecture, design, tape-out, and silicon validation of RFIC beamformers and RF/mm-wave circuits for phased array communications and radar systems. Drive simulations, lab characterization, system-level trade-offs, design methodology, and technical roadmap decisions while collaborating with antenna, digital, and DSP teams. Mentor engineers and guide complex RFIC design challenges across the product lifecycle.

Design and implement digital RTL for beamformer control, calibration, interfaces, high-speed data paths, and system-level logic. Own designs from architecture through synthesis, timing closure, place-and-route support, and ASIC or FPGA validation. Perform simulation, lint, CDC analysis, and debugging while collaborating with RFIC, antenna, DSP, verification, and lab teams. Help define interfaces, document designs, and shape engineering methodologies at an early-stage company.

Design, simulate, fabricate, test, troubleshoot, and integrate passive and active phased-array antennas and microwave components. Collaborate with RFIC, digital, software, and systems engineers across product development, contribute to array software testing, support platform integration for ground, drone, and satellite applications, and provide hands-on product lifecycle support.

Own the full lifecycle of electronics hardware for phased-array communications and radar products. Responsibilities include electrical system design, requirements definition, schematic capture, component selection, PCB layout and manufacturing oversight, rapid prototyping, bench verification, hardware bring-up, troubleshooting, integration, production support, and in-field performance monitoring. The role collaborates with RF, antenna, software, mechanical, thermal, and DSP engineers across product development and deployment.