Lead the design of analog circuits for advanced systems, ensuring development and verification of silicon IPs, while collaborating closely with various engineering teams.

As a Deep Learning Libraries engineer, you will develop and optimize Deep Learning operators, collaborate with teams, and influence HW architecture for performance improvement.

The Senior Field Application Engineer provides technical support for integrating GPU and CPU solutions, collaborating with customers, conducting presentations, and solving application issues.

The eFA Engineer conducts fault isolation and failure analysis of SoCs, designs experiments, and drives corrective actions to improve product quality.

Develop and debug emulation models for SOC projects, collaborate across teams, and improve emulation methodology. Requires knowledge in digital logic and SOC architecture.

The role focuses on performance analysis, modeling, and validation for deep learning systems, enhancing both hardware and software responsiveness.

The LEC Engineer will improve logical equivalence checks, automate verification flows, and collaborate with design teams and vendors for tool enhancements.

As a Logic Equivalence Check Engineer, you will build formal verification flows, improve debugging processes, and integrate solutions with cross-functional teams.

Develop cutting-edge test generation strategies for validating accelerator designs, collaborating with hardware and software teams to create a variety of tests.

The ESD Engineer develops and implements ESD control procedures, tests products for ESD susceptibility, and conducts ESD simulations while investigating incidents.

Lead the productization of semiconductor chips, develop test plans, analyze data, and improve designs through collaboration with cross-functional teams.

Design and deliver custom SRAM and register file memories, optimize performance and power, and collaborate across teams to enhance circuit designs.

As a System Hardware Engineer, you will design schematics, develop system designs, conduct lab bring-up and testing, and collaborate on power and signal integrity analysis.

The DFT Engineer will design and validate DFT features, create test plans, and collaborate with teams to meet requirements. Responsibilities include debugging and ensuring compliance with DFT methodologies.

Develop custom SRAM and register file memories to enhance circuit performance. Collaborate across disciplines for design implementation and optimization.

Analyze power dissipation in server workloads, collaborate with teams to optimize power/performance ratio, and automate measurement infrastructure.

The FPGA Design Engineer will design, implement and verify FPGA systems, conduct lab testing, and potentially expand into firmware development.

Design and develop SRAM and register file memories, ensuring performance and low power usage while collaborating on custom circuit design and implementation.

Develop custom SRAM and register file memories, improve circuit performance, optimize power, and support silicon bring up. Requires extensive experience in circuit design and collaboration with various teams.

The Memory Subsystem Architect specifies memory subsystem architecture, collaborates with internal teams, and contributes to industry standards while ensuring performance and power requirements are met.