Jobs at Phizenix

Leads hands-on architecture, development, modernization, and deployment of scalable software platforms. Establishes engineering standards, reusable components, governance processes, and long-term technical direction. Mentors engineers, drives adoption of modern development practices and DevSecOps, collaborates with product owners and stakeholders, and provides technical leadership across cross-functional teams.

Own core backend computation services that transform financial and operational data into correct, reproducible, traceable results. Design configuration-driven component libraries and runtimes, set-based warehouse computations, tenant-level guardrails, feature controls, audit logging, and data lineage. Build isolated, multi-cloud-ready customer-hosted deployments and integrate them with enterprise environments. Work directly with customer engineering and finance teams, establish backend architecture patterns, review designs, mentor engineers, and collaborate with data, AI, and product teams.

Leads the creation of the company’s QA function, including automation frameworks, testing strategy, quality processes, metrics, and team development. Owns API, frontend, backend, database, performance, security, CI/CD, and AI/ML testing for a financial SaaS platform. Builds and manages a QA team, establishes release quality gates, validates LLM behavior and responsible AI practices, coordinates compliance and security testing, and partners with Product, Engineering, and DevOps to improve reliability.

Lead design and verification of high-speed analog and mixed-signal circuits (ADCs, DACs, PLLs, TIAs, SerDes, optical drivers) through tape-out and post-silicon bring-up in advanced FinFET or SOI processes. Collaborate cross-functionally, create documentation, present to leadership, and mentor junior designers.

Lead RTL-to-GDSII implementation on advanced-node digital designs, driving PPA and quality-of-results. Own flows, debug complex issues, collaborate with CAD/design/program teams, mentor juniors, adopt new tools and ML techniques, and engage EDA vendors to resolve root causes.

Senior individual contributor or technical lead designing and verifying high-speed analog and mixed-signal ICs (ADCs, DACs, PLLs, TIAs, laser/modulator drivers, SerDes). Drive transistor-level design and layout in advanced FinFET/SOI processes, lead pre-/post-silicon validation, collaborate with cross-functional teams, document results, and mentor junior designers.

Lead and execute analog/mixed-signal IC design for high-speed interconnects from architecture through tape-out and bring-up. Manage and mentor a design team, coordinate external contractors and IP vendors, design/verify SerDes front-ends, optical drivers, ADC/DACs, and transistor-level schematics in advanced FinFET/SOI nodes, drive pre-silicon simulation and post-silicon debug to meet PPA targets.

Develop synthesizable RTL from micro-architecture, write bare-metal firmware for on-chip RISC CPUs, drive pre-silicon simulation and hardware-software co-verification, lead synthesis/timing closure and equivalence checking, build emulation environments, and perform silicon bring-up and post-silicon debug while collaborating across analog, verification, and physical-design teams.

Lead product for workflow-focused AI features in a B2B SaaS insurance platform. Partner with users, GTM, and engineering to design, ship, and measure intelligent workflow automation, pilot deployments, and expansions to reduce manual effort and build trust in AI recommendations.