Teams at NVIDIA

Responsible for verifying components of high-performance, low-power chips, implementing verification components, and collaborating with design teams.

Lead design and implementation of security systems and controls for large-scale AI and HPC cluster infrastructure. Drive incident response, risk assessment, system hardening, governance, audit readiness, and cross-team collaboration to protect hardware, software, and datacenter platforms.

Design and implement high-speed digital front-end and back-end for DSPs and silicon photonics IPs: define micro-architecture, calibration algorithms, translate to RTL/firmware, create synthesis constraints, drive timing closure, evaluate PPA trade-offs, and lead post-silicon bring-up, testing, characterization, and cross-functional production handoff.