The Test Engineer will lead silicon photonics system testing, develop methodologies, automate tests, troubleshoot issues, and document findings.

The Test Engineering Lead will oversee the design and execution of test systems for photonics devices, ensuring quality and performance through collaboration and advanced testing methodologies.

The Lead Hardware Engineer will design advanced digital and embedded systems for optical switches, focusing on microcontroller architecture, memory systems, and digital board design, while integrating FPGA logic and supporting manufacturing processes.

As a Reliability Engineer, you will develop and analyze reliability test programs for MEMS and silicon photonic devices, focusing on stress testing and failure analysis.

The ASIC Design Principal Engineer will lead the development of custom CMOS integrated circuits, oversee testing and quality assurance, and collaborate with various engineering teams in the ASIC lifecycle.

The Process Intern will assist in the development and optimization of semiconductor processes, operate fabrication tools, analyze process data, and support engineering teams in a cleanroom environment.

Seeking a Process/MEMS Engineer to improve Si photonics MEMS technology for optical switches, focusing on wafer design, fabrication methodologies, and process analysis.

The Senior MEMS Design Engineer at nEye.ai is responsible for designing, simulating, and optimizing MEMS devices for optical circuit switches, collaborating with multi-disciplinary teams, and ensuring high manufacturing reliability.

The role involves failure analysis of MEMS-based optical switches, troubleshooting failures, performing experiments, root-cause analysis, and developing corrective actions while communicating findings effectively.

The role involves developing software for optical test automation, managing data pipelines, collaborating across teams, and enhancing testing efficiency for silicon photonics.