Jobs at Morse Micro

Develop and maintain embedded firmware for IoT Wi-Fi HaLow devices, including RTOS drivers, network stack integration, 802.11ah upper layers, bootloaders, interrupt handlers, DMA routines, and performance and power optimizations. Build Python testing tools, troubleshoot customer issues, and collaborate with hardware and systems engineers. The role requires C firmware development, Linux drivers, ARM Cortex and RISC-V architectures, hardware buses, static analysis, and automated testing.

Own IT service delivery end-to-end, drive automation to remove manual toil, build integrations across identity/SSO/device management and cloud, support multi-OS environments and local network/infrastructure, provide hands-on Level 1–4 support, and maintain security/compliance-aligned runbooks and documentation.

Lead product strategy and roadmap for Wi‑Fi HaLow wireless MCUs. Define PRDs/MRDs, pricing, datasheets, and go‑to‑market plans. Coordinate engineering, sales, FAEs, marketing, and project teams to deliver products on time, based on market research and customer feedback.

Lead sales strategy and execution for Morse Micro's Wi‑Fi HaLow products in China. Manage key accounts, distributors and REPs; build OEM/ODM relationships, drive design-ins and revenue funnels, identify new markets, collaborate with product and marketing, and represent the company at trade shows to grow market share and profitability.

Lead end-to-end DFT for wireless SoCs: define DFT architecture, implement scan/MBIST/JTAG solutions, generate and validate ATPG/MBIST patterns, support gate-level simulation and silicon bring-up, drive post-silicon debug, yield analysis, automation, and cross-functional tapeout collaboration.

Own the Irvine failure analysis lab: receive and track returned units, run module-level Tx/Rx RF tests, perform multi-unit failure triage and component isolation, produce customer-facing FA reports, coordinate async investigations with remote Engineering via Jira/Confluence, and support OSAT/vendor quality and JEDEC qualification reviews.

Lead RTL and microarchitecture development using SystemVerilog and Chisel for SoC/digital subsystems, drive verification and power-aware flows (UPF/CPF, CDC/RDC, GLS, FPGA), integrate mixed-signal IP, support synthesis/P&R/tapeout, apply low-power techniques, adopt AI tools to accelerate design/verification, coordinate cross-functional teams, and mentor junior engineers to deliver complex chip projects on schedule.

Manage end-to-end international logistics including shipment coordination, warehouse/3PL and consignment inventory, inventory control, customer RMA processing, and cross-functional support to optimize costs and ensure timely delivery for semiconductor/module production.