Jobs at Morse Micro

Lead sales strategy and execution for Morse Micro's Wi‑Fi HaLow products in China. Manage key accounts, distributors and REPs; build OEM/ODM relationships, drive design-ins and revenue funnels, identify new markets, collaborate with product and marketing, and represent the company at trade shows to grow market share and profitability.

Design and debug RF electronics and application reference designs for Wi‑Fi (802.11ah) chips. Perform PCB schematic/layout in Altium, bench test with vector instruments, validate and certify hardware, integrate systems, and document designs.

Lead RTL and microarchitecture development using SystemVerilog and Chisel for SoC/digital subsystems, drive verification and power-aware flows (UPF/CPF, CDC/RDC, GLS, FPGA), integrate mixed-signal IP, support synthesis/P&R/tapeout, apply low-power techniques, adopt AI tools to accelerate design/verification, coordinate cross-functional teams, and mentor junior engineers to deliver complex chip projects on schedule.

Manage end-to-end international logistics including shipment coordination, warehouse/3PL and consignment inventory, inventory control, customer RMA processing, and cross-functional support to optimize costs and ensure timely delivery for semiconductor/module production.

Lead end-to-end DFT for wireless SoCs: define DFT architecture, implement scan/MBIST/JTAG solutions, generate and validate ATPG/MBIST patterns, support gate-level simulation and silicon bring-up, drive post-silicon debug, yield analysis, automation, and cross-functional tapeout collaboration.

Develop embedded firmware and applications for ARM, RISC-V and ESP32 platforms using Embedded C and RTOS. Build SDKs, tools, demos, drivers, bootloaders and debugging solutions for 802.11.ah devices. Collaborate with customers and internal teams to deliver robust, high-quality wireless IoT solutions and provide upstream feedback to improve products.

Lead product vision, strategy and roadmaps for wireless IoT semiconductor products. Drive pricing, datasheets, technical documentation, go-to-market, and cross-functional coordination with engineering, sales, marketing, FAEs and project teams. Prioritize features, manage tradeoffs, perform market research and competitive analysis, and track product performance from concept through launch.

Serve as the on-site front-of-house for the Sydney office: greet visitors, manage office supplies and food/beverage orders, coordinate shipments, maintain communal areas, support staff needs (printing, meeting setup, equipment), and help organize events. Provide hands-on support including occasional lifting and light facilities tasks.

Lead South America sales for Morse Micro's Wi‑Fi HaLow products, build customer and partner relationships, develop and execute sales plans, drive pipeline reviews and market penetration, collaborate with product and marketing, and represent the company at trade shows to achieve profitable revenue growth.

Design, implement and own end-to-end DFT for wireless SoCs: define DFT architecture, implement SCAN/MBIST/JTAG, generate and validate ATPG/MBIST patterns, support tapeout, silicon bring-up, ATE debug, and cross-functional yield and diagnostic efforts.

Own the Irvine failure analysis lab: receive and track returned units, run module-level Tx/Rx RF tests, perform multi-unit failure triage and component isolation, produce customer-facing FA reports, coordinate async investigations with remote Engineering via Jira/Confluence, and support OSAT/vendor quality and JEDEC qualification reviews.

Support Semiconductor Operations by driving process execution, KPI tracking, cross-functional coordination, supply & demand planning support, reporting/dashboard development, continuous improvement, and administrative tasks to scale operations.

Lead development of SystemVerilog and cocotb testbenches and verification flows for a secure Wi‑Fi HaLow SoC. Create coverage-driven SV/Verilator/GLS tests, debug RTL, validate security features, run power and timing analysis, and collaborate with designers to close verification for complex CPU/memory/interconnect subsystems.