Teams at Mirafra Technologies

Perform formal and functional verification for ASIC/digital designs using assertion languages (SVA/SystemVerilog), EDA formal tools, and verification methodologies. Develop scripts and automation using shell, Perl, Java, and manage revisions with CVS/DesignSync/Subversion. Collaborate on verification plans and use C/C++/SystemC as needed.

Coordinate multi-site teams for mobile platform build and release. Manage configuration, branching/merging, and build systems. Triage GPS-domain issues, perform limited hands-on testing, and follow internal processes. Support embedded/C development and scripting for automation.

Perform full-chip and block-level physical design: floorplanning, P&R, clock-tree synthesis, timing closure/STA, low-power implementation, power integrity and IR-drop, and physical verification to take hardmacros from netlist to GDS using industry EDA tools.