Jobs at Lightmatter

Lead STA sign-off and timing closure for silicon-photonics ASICs across process nodes. Develop timing constraints, run full-chip STA, automate ECOs with Tempus/PrimeTime, collaborate with RTL/DFT/architecture teams, and document best practices for synthesis through PnR and tapeout signoff.

Develop and maintain photonics PDK components and pcells, ensure synchronization between layouts, netlists, and models, author LVS/DRC decks, perform device extraction and LVS troubleshooting, build automated regression and CI pipelines, and collaborate across design, layout, and modeling teams to support tape-outs.

Lead program management for silicon, package, and systems development from design through production. Drive planning, schedules, risk management, cross-functional coordination, vendor/customer engagement, and project communications to meet milestones and quality targets.

The Staff Mechanical Engineer will focus on mechanical design, structural analysis, GD&T, and FEA to enhance packaging technologies for AI architectures at Lightmatter.

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact behavioral models, automate parameter extraction from FDTD/FEM solvers, correlate models with lab measurements, implement CI/regression tests, and own netlist extraction and connectivity logic for circuit-level simulation.

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact models for active/passive devices, automate parameter extraction from FDTD/FEM solvers, validate models against lab measurements, implement CI/regression testing, and own netlist extraction and connectivity logic to ensure accurate system-level simulation.

The Physical Design Timing Engineer will drive backend digital execution, focusing on timing constraints, analysis, and closure on advanced CMOS technologies. Responsibilities include STA sign-off, collaborating with multiple teams, managing timing complexities, and automating timing ECO generation.

Lead development of the internal photonics PDK and component library. Build Python-based pcells, create and validate compact models for active and passive devices, automate parameter extraction from electromagnetic solvers, and correlate models with lab measurements. Implement regression testing, CI pipelines, and robust netlist/connectivity logic to ensure layout, models, and simulations remain synchronized.

Design, validate, and deploy DFT solutions for digital, analog, and photonic ASICs. Develop scalable automated flows, collaborate with RTL and physical-design teams, implement ATPG/MBIST/boundary-scan strategies, support pre-silicon validation and post-silicon bring-up and debug, and optimize test coverage and integration for production products.

Lead DFT insertion and ATPG for ASIC designs, perform post-silicon bring-up and ATE test program debug, script and automate DFT/ATPG flows, interface with physical design and RTL teams, and support synthesis through place-and-route timing closure and tape-out signoff.

Design and deploy chip, module, and system-level DFT solutions for a photonics-based AI platform. Develop and automate DFT methodologies (ATPG, MBIST, boundary-scan), integrate with RTL and physical design, validate pre-silicon implementations, support post-silicon bring-up and debug, and scale test flows for production.

Responsible for timing constraints development, STA and timing closure on CMOS technologies, driving timing sign-off, analyzing power/performance tradeoffs, and running full-chip STA.

Lead system-level electrical design and integration for silicon photonics AI accelerators. Define hardware requirements, design power/memory/interconnect circuits, oversee PCB layout and manufacturability, validate and qualify electrical properties, perform lab validation, and collaborate with mechanical, IC, software, and manufacturing teams to bring products from concept to production.

Lead system-level electrical design for silicon-photonics AI accelerators: define requirements, design power/memory/interconnect circuits, oversee PCB layout and manufacturability, validate and qualify boards in lab, integrate cross-functionally, support contract manufacturing and vendor selection.

Research and model performance of Lightmatter-enabled hardware systems for ML training and inference. Build performance modeling tools, design rack-scale reference platforms, collaborate with product and engineering, publish academic and industry research, and act as the in-house ML systems expert.

The Staff Physical Design Engineer will implement digital blocks using advanced tech nodes, focusing on timing closure and power integrity, while collaborating with teams on ASIC design.

Implement and sign off complex digital blocks from synthesis through physical verification in advanced process nodes. Drive full-chip STA and timing closure, power analysis, floorplanning, IO and clock distribution, DRC/LVS cleanup, and functional/timing ECOs. Automate flows with TCL/Python/Shell, collaborate across teams, and work with EDA vendors to resolve tool issues.

Lead implementation of complex digital blocks from synthesis through physical verification on advanced nodes (3nm). Drive timing closure, power and EM/IR analysis, full-chip floorplanning, IO and clock distribution, DRC/LVS cleanup, ECOs, and collaborate with EDA vendors. Automate and customize flows using Tcl/Python/Shell; support tape-out and photonics integration.

The Photonics Technical Lead will create scalable laser solutions for silicon photonics AI communications, collaborating across teams to ensure design feasibility and meet performance specifications.

The Staff Electrical Test Engineer will develop and implement ATE test solutions for Silicon Photonics products, support manufacturing testing, collaborate with teams to debug failures, and enhance testing productivity with scripting.