Jobs at Lightmatter

Lead DFT insertion and ATPG for ASIC designs, perform post-silicon bring-up and ATE test program debug, script and automate DFT/ATPG flows, interface with physical design and RTL teams, and support synthesis through place-and-route timing closure and tape-out signoff.

Responsible for timing constraints development, STA and timing closure on CMOS technologies, driving timing sign-off, analyzing power/performance tradeoffs, and running full-chip STA.

Design and deploy chip, module, and system-level DFT solutions for a photonics-based AI platform. Develop and automate DFT methodologies (ATPG, MBIST, boundary-scan), integrate with RTL and physical design, validate pre-silicon implementations, support post-silicon bring-up and debug, and scale test flows for production.

Design, validate, and deploy DFT solutions for digital, analog, and photonic ASICs. Develop scalable automated flows, collaborate with RTL and physical-design teams, implement ATPG/MBIST/boundary-scan strategies, support pre-silicon validation and post-silicon bring-up and debug, and optimize test coverage and integration for production products.

Design and analyze power delivery networks for high-performance compute SoCs across package and system architectures. Perform electromagnetic, time-domain, and frequency-domain simulations; model regulators; evaluate voltage droop and overshoot; conduct lab measurements; and collaborate with hardware, layout, and systems teams to improve power integrity. Document analyses, support design reviews, monitor layout constraints, and contribute to architectural tradeoff studies.

Drive signal integrity engineering for high-speed photonics and computing products from architecture through lab validation. Analyze PCIe, UCIe, and SerDes channels using S-parameters, eye and jitter analysis, equalization, and simulation tools. Collaborate with hardware and PCB layout teams on impedance, routing, termination, and packaging. Perform measurements with oscilloscopes, VNAs, network analyzers, and TDRs, troubleshoot issues, support design reviews, and document results and guidelines.

Designs IC package substrate layouts for standard and advanced packaging technologies. Responsibilities include package floorplanning, stack-up optimization, signal and power integrity routing, DFM/DFA closure, fab-file generation, supplier and OSAT coordination, package tape-outs, and design automation. The role supports analog, digital, and photonics package architectures, including multi-chiplet and 2.5D/3D packaging solutions.

Lead system-level electrical design and integration for silicon photonics AI accelerators. Define hardware requirements, design power/memory/interconnect circuits, oversee PCB layout and manufacturability, validate and qualify electrical properties, perform lab validation, and collaborate with mechanical, IC, software, and manufacturing teams to bring products from concept to production.

Research and model performance of Lightmatter-enabled hardware systems for ML training and inference. Build performance modeling tools, design rack-scale reference platforms, collaborate with product and engineering, publish academic and industry research, and act as the in-house ML systems expert.

Designs, tests, analyzes, integrates, qualifies, and documents mechanical hardware for AI server chassis and rack platforms. Responsibilities include CAD, drawings, BOMs, thermal and structural analysis, prototype builds, design reviews, root-cause investigations, contract manufacturer oversight, supply-chain coordination, and production scaling. The role focuses on electronics and photonics packaging, thermal management, manufacturability, and collaboration with cross-functional engineering and program teams.

Design and validate analog and mixed-signal circuits (data converters, amplifiers, drivers, comparators, bandgaps) for photonics and wireline systems. Collaborate with architects and cross-functional teams on feasibility, floorplanning, post-layout simulation, testing, and production/bench-level validation. Document simulations and drive design reviews.

Lead implementation of complex digital blocks from synthesis through physical verification on advanced nodes (3nm). Drive timing closure, power and EM/IR analysis, full-chip floorplanning, IO and clock distribution, DRC/LVS cleanup, ECOs, and collaborate with EDA vendors. Automate and customize flows using Tcl/Python/Shell; support tape-out and photonics integration.

The Staff Physical Design Engineer will implement digital blocks using advanced tech nodes, focusing on timing closure and power integrity, while collaborating with teams on ASIC design.

Implement and sign off complex digital blocks from synthesis through physical verification in advanced process nodes. Drive full-chip STA and timing closure, power analysis, floorplanning, IO and clock distribution, DRC/LVS cleanup, and functional/timing ECOs. Automate flows with TCL/Python/Shell, collaborate across teams, and work with EDA vendors to resolve tool issues.

Own and grow major customer accounts across the full sales cycle. Build trusted relationships from engineers to C-suite, position Lightmatter solutions, coordinate cross-functional teams, forecast pipeline, lead negotiations, and close complex enterprise deals while expanding account footprint.

Design, layout, simulate, and test silicon photonic devices and integrated laser systems. Collaborate with packaging, systems, and characterization teams to validate performance, troubleshoot issues, optimize for manufacturing variability, and publish/present novel photonics results at conferences.

The Photonics Technical Lead will create scalable laser solutions for silicon photonics AI communications, collaborating across teams to ensure design feasibility and meet performance specifications.

The Staff Electrical Test Engineer will develop and implement ATE test solutions for Silicon Photonics products, support manufacturing testing, collaborate with teams to debug failures, and enhance testing productivity with scripting.

Lead development and qualification of silicon foundry processes for integrated photonic AI platforms. Define process flows, collaborate with foundries and design teams, establish yield and reliability metrics, and drive product tapeout through production and lifetime characterization.

Lead hands-on verification and lab characterization of high-speed electro-optic links. Build and validate electrical/optical/channel models, characterize BER/eye/jitter/equalization, support silicon bring-up and cross-team debug, own link budget and verification methodology, mentor engineers, and build automation tools to accelerate characterization.