Jobs at Lightmatter

Conduct electro-optic testing and characterization of silicon photonics chips and components, including micro-rings, phase shifters, and Mach-Zehnder interferometers. Operate optical and semiconductor test equipment, design testing protocols, and develop automated testing systems using Python. Analyze experimental data, solve complex technical problems independently, and translate findings into actionable strategies in a photonics laboratory environment.

Characterize and debug high-speed electro-optic links through hands-on laboratory measurements, including eye diagrams, BER, jitter, equalization, link budgets, and process/voltage/temperature testing. Build electrical, optical, and electro-optic channel models, automate instrument control and data analysis using Python or MATLAB, support silicon bring-up and root-cause investigations, and document repeatable measurement methods and results.

Provides technical leadership for hardware systems developing silicon photonics-based AI accelerators and interconnect platforms. Owns multiple hardware projects from concept through production, including PCBA definition, system integration, verification, validation, documentation, and production release. Collaborates across electrical, mechanical, packaging, firmware, photonics, software, and IC engineering teams while mentoring engineers and driving technology roadmaps. Requires deep expertise in VRMs, high-speed SerDes, and major hardware interfaces.

Own end-to-end simulation, co-design, and laboratory verification of photonic-electronic links. Develop multi-physics optical and analog models, perform corner, Monte Carlo, and PVT analyses, create link budgets, and correlate simulations with silicon measurements. Partner with photonic and analog circuit teams on architecture, specifications, interface requirements, and corrective design actions. The role requires high-speed optical lab expertise, silicon photonics experience, and proficiency in photonic, mixed-signal, and Python-based simulation workflows.

Owns major enterprise customer accounts and drives the full sales cycle from engagement through deal closure. Responsibilities include developing account strategies, expanding revenue, building executive and technical relationships, positioning complex photonics and data center solutions, forecasting pipeline, leading negotiations, and coordinating cross-functional teams to deliver customer success.

The Staff Mechanical Engineer will focus on mechanical design, structural analysis, GD&T, and FEA to enhance packaging technologies for AI architectures at Lightmatter.

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact behavioral models, automate parameter extraction from FDTD/FEM solvers, correlate models with lab measurements, implement CI/regression tests, and own netlist extraction and connectivity logic for circuit-level simulation.

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact models for active/passive devices, automate parameter extraction from FDTD/FEM solvers, validate models against lab measurements, implement CI/regression testing, and own netlist extraction and connectivity logic to ensure accurate system-level simulation.

The Physical Design Timing Engineer will drive backend digital execution, focusing on timing constraints, analysis, and closure on advanced CMOS technologies. Responsibilities include STA sign-off, collaborating with multiple teams, managing timing complexities, and automating timing ECO generation.

Lead development of the internal photonics PDK and component library. Build Python-based pcells, create and validate compact models for active and passive devices, automate parameter extraction from electromagnetic solvers, and correlate models with lab measurements. Implement regression testing, CI pipelines, and robust netlist/connectivity logic to ensure layout, models, and simulations remain synchronized.

Responsible for timing constraints development, STA and timing closure on CMOS technologies, driving timing sign-off, analyzing power/performance tradeoffs, and running full-chip STA.

Design and analyze power delivery networks for high-performance compute SoCs across package and system architectures. Perform electromagnetic, time-domain, and frequency-domain simulations; model regulators; evaluate voltage droop and overshoot; conduct lab measurements; and collaborate with hardware, layout, and systems teams to improve power integrity. Document analyses, support design reviews, monitor layout constraints, and contribute to architectural tradeoff studies.

Drive signal integrity engineering for high-speed photonics and computing products from architecture through lab validation. Analyze PCIe, UCIe, and SerDes channels using S-parameters, eye and jitter analysis, equalization, and simulation tools. Collaborate with hardware and PCB layout teams on impedance, routing, termination, and packaging. Perform measurements with oscilloscopes, VNAs, network analyzers, and TDRs, troubleshoot issues, support design reviews, and document results and guidelines.

Designs IC package substrate layouts for standard and advanced packaging technologies. Responsibilities include package floorplanning, stack-up optimization, signal and power integrity routing, DFM/DFA closure, fab-file generation, supplier and OSAT coordination, package tape-outs, and design automation. The role supports analog, digital, and photonics package architectures, including multi-chiplet and 2.5D/3D packaging solutions.

Lead system-level electrical design and integration for silicon photonics AI accelerators. Define hardware requirements, design power/memory/interconnect circuits, oversee PCB layout and manufacturability, validate and qualify electrical properties, perform lab validation, and collaborate with mechanical, IC, software, and manufacturing teams to bring products from concept to production.

Research and model performance of Lightmatter-enabled hardware systems for ML training and inference. Build performance modeling tools, design rack-scale reference platforms, collaborate with product and engineering, publish academic and industry research, and act as the in-house ML systems expert.

Designs, tests, analyzes, integrates, qualifies, and documents mechanical hardware for AI server chassis and rack platforms. Responsibilities include CAD, drawings, BOMs, thermal and structural analysis, prototype builds, design reviews, root-cause investigations, contract manufacturer oversight, supply-chain coordination, and production scaling. The role focuses on electronics and photonics packaging, thermal management, manufacturability, and collaboration with cross-functional engineering and program teams.

Lead implementation of complex digital blocks from synthesis through physical verification on advanced nodes (3nm). Drive timing closure, power and EM/IR analysis, full-chip floorplanning, IO and clock distribution, DRC/LVS cleanup, ECOs, and collaborate with EDA vendors. Automate and customize flows using Tcl/Python/Shell; support tape-out and photonics integration.

The Staff Physical Design Engineer will implement digital blocks using advanced tech nodes, focusing on timing closure and power integrity, while collaborating with teams on ASIC design.

Implement and sign off complex digital blocks from synthesis through physical verification in advanced process nodes. Drive full-chip STA and timing closure, power analysis, floorplanning, IO and clock distribution, DRC/LVS cleanup, and functional/timing ECOs. Automate flows with TCL/Python/Shell, collaborate across teams, and work with EDA vendors to resolve tool issues.