Jobs at Fractile

Own and scale CI infrastructure, multi-language Bazel monorepos, and developer platform systems for AI hardware and software engineering. Responsibilities include building reproducible CI pipelines, optimizing performance across compute clusters, maintaining observability and alerting, supporting incident response, implementing infrastructure as code, and improving reliability and developer productivity. The role requires strong experience with CI/CD, build systems, DevOps/SRE practices, infrastructure tooling, and Python, Go, or Rust development.

Maintain and troubleshoot on-premise Rocky/RHEL Linux servers, compute clusters, networking, storage, and job scheduling infrastructure. Deploy infrastructure using Ansible or similar infrastructure-as-code tools, maintain monitoring and observability systems, manage user identities and access, troubleshoot performance issues, document changes, and support engineers with infrastructure bottlenecks. The role requires strong Linux administration, networking, storage, scripting, independent troubleshooting, and ownership skills, with HPC and data-center experience desirable.

Drive end-to-end power, performance, and area closure for high-performance datapaths. Responsibilities include analyzing PPA bottlenecks, proposing RTL and microarchitectural changes, optimizing fixed-point, floating-point, or quantized arithmetic, closing timing through synthesis and STA iteration, applying low-power techniques, and collaborating with physical design engineers. The role also involves validating measurable silicon improvements and using formal verification or equivalence checking.

Analyze semiconductor manufacturing and test data across NPI, yield engineering, product quality, and high-volume production. Identify yield-loss mechanisms, process variation, failure signatures, outliers, and reliability issues; conduct root-cause investigations and statistical analyses; and develop automated scripts, dashboards, and repeatable workflows. Communicate findings through visualizations, reports, and presentations while collaborating with engineering teams and global manufacturing partners. Worldwide travel may be required.

Lead technically informed sourcing and procurement for electronic components and EMS/CM partners. Own RFQs, cost modeling, supplier negotiations, qualification, NPI sourcing, BOM cost analysis, lifecycle management, risk mitigation, and dual-sourcing strategies. Collaborate with engineering, manufacturing, quality, finance, and program teams to optimize cost, availability, quality, and scalability across the product lifecycle.

Design and implement production-ready board/PCBA test solutions and DRAM test methodologies. Diagnose DRAM failures across logical, architectural, and physical domains using simulation, statistical analysis, and modeling. Build and maintain simulation models, analyze large test datasets, and collaborate with design, architecture, and manufacturing teams to improve reliability and yield.

The Lead Physical Design Engineer will manage IC physical design implementations from synthesis to sign-off, leading a team and collaborating across functions to optimize performance and manufacturability while mentoring others in the process.

As a Senior System Architect, you will design system architectures for AI applications, ensuring integration and performance from concept to production by collaborating with hardware and software teams.

The Senior System Architect will define hardware architecture, oversee system design and integration, and ensure technical excellence across disciplines. Responsibilities include developing system roadmaps, collaborating with teams on designs, and mentoring for design discipline.

The Lead Physical Design Engineer will implement complex IC designs, collaborating across teams to optimize performance, power, and area while ensuring manufacturability and design integrity.

Lead and grow a 10+ engineer compiler team to build the compiler stack for a novel AI accelerator. Drive compiler architecture, IR design, lowering strategies and performance optimisation, collaborating closely with hardware, driver, runtime and ML teams to enable industry-leading LLM inference performance.

Build developer-facing tooling, diagnostics, and workflows to run and optimise large language models on Fractile inference hardware. Create profiling/observability interfaces, quickstarts, docs, and examples. Advocate for external developer needs internally and collaborate with ML compiler, runtime, systems software, and silicon teams to shape APIs and abstractions.

The role involves taking high-performance PCBAs from prototype to production, focusing on manufacturing processes and quality metrics. It requires deep expertise in PCB design and factory operations, particularly with Taiwan partners.

Lead the end-to-end DFT architecture for a multi-core AI accelerator SoC, ensuring integration, compliance, and effective test strategies while mentoring a team.

Define and drive the architecture of compute engines, managing specifications, performance modelling, and collaborating with various teams to ensure optimal designs.

As a Processor Architect, you'll develop and drive the architecture of compute engines, working with multiple teams to optimize performance and efficiency while defining specifications and mentoring others.

The Senior Logical Design Engineer will develop and implement high-performance RTL designs, collaborating with cross-functional teams, ensuring compliance with documentation and standards.

The role involves designing and implementing digital systems, focusing on developing RTL designs for high-performance and power-efficient systems while collaborating with cross-functional teams.

The Senior Verification Engineer will lead pre-silicon RTL verification processes, build testbenches, and improve hardware workflows in a collaborative team focused on ML/AI IC products.

As a Silicon Verification Engineer, you will verify ML/AI IC products, ensuring high standards of functional quality while collaborating across teams.