Jobs at Cerebras Systems

The Physical Design Engineer will perform synthesis, timing closure, and integration tasks, collaborating with the RTL team to optimize design flow.

The Performance Engineer - Inference will optimize model inference speed and throughput, debug low-level kernel performance, and develop tools to visualize performance data.

The Head of IT will build and manage the company's technology backbone, focusing on IT strategy, scaling, endpoint management, SaaS governance, and compliance while supporting rapid growth in a high-tech environment.

Lead post-silicon bring-up and optimization of wafer-scale engines: develop debug flows, HW-SW codesign optimizations, build large-scale test infrastructure, create self-checking metrics and instrumentation, and collaborate across silicon, performance, and software teams to improve production performance and release processes.

Build and maintain embedded and system-level software for the wafer-scale AI processor, including administrative services, Linux BSP support, hardware monitoring, diagnostics, and cross-team collaboration to improve reliability and observability.

Design and implement system-level debugging, validation, and observability platforms. Build automated anomaly detection, visualization and analysis tools, and frameworks for failure classification and regression detection. Extend compilers, runtimes, and instrumentation for advanced profiling. Improve bring-up and low-level debug workflows, partner cross-functionally across hardware, firmware, compiler and runtime teams, lead high-impact initiatives, and support incident response and long-term corrective actions.

As an ML Research Engineer, you will adapt and optimize language and vision models for efficient inference on Cerebras hardware, focusing on advanced techniques for low-latency, high-throughput performance.

Lead post-silicon bring-up and performance optimizations for Cerebras Wafer Scale Engines. Develop/debug production-ready flows, instrumentation, and self-checking metrics. Build infrastructure for large-scale silicon workload testing, collaborate with silicon architects, performance and software teams, and streamline CI/CD and release workflows.

Design, develop, and maintain manufacturing test automation from PCBA to system level, build GUIs and web portals, support contract manufacturers, deploy infrastructure, troubleshoot test software and hardware defects, and integrate test data for traceability and yield improvement.

As a 3D Physical Design Engineer, you'll design and analyze 3D integrated products, focusing on ASIC/SoC design, power, clock, and cooling analysis with an emphasis on physical design methodology.

The Director of Cost Accounting leads cost-related financial activities, ensures accurate costing, and partners with various departments to support company growth and IPO readiness.

Lead and build a research-focused ML team to develop post-training/RL, dataset curation, LLM pretraining, and sparsity techniques; adapt algorithms to Cerebras hardware, run systematic model evaluation, and collaborate with internal teams and external partners to drive production deployments and hardware/software co-design.

As a new engineer at Cerebras, you'll learn their platforms, focusing on programming the Wafer Scale Engine, kernel development, and system performance modeling.

Drive Manufacturing Quality across contract manufacturers, ensuring systems meet quality standards, manage NPI quality readiness, and facilitate continuous improvement through effective problem-solving as part of the Quality Engineering team.

The Director of Business Operations will establish analytics and execution systems, driving operational change and insights to improve performance across supply chain, manufacturing, and data center operations in a rapidly scaling company.

Design and execute verification strategies and reusable SystemVerilog/UVM testbenches. Implement tests, manage regressions, collect coverage, debug across simulation, emulation, and silicon bring-up, and collaborate with architects, RTL, physical design, firmware, and software teams to ensure silicon-quality designs.

The Applied AI Scientist will develop large language models and deep learning solutions, customizing AI systems to meet client needs, and collaborate with stakeholders for project scoping and model architecture selection.

Lead development of test programs and ATE strategy for wafer-scale AI/ML accelerator chips. Design DFT and scalable wafer-level test methodologies, fault isolation, probe/load-board specs, characterization (di/dt, V-F), yield optimization, and cross-functional production debug.

The Kernel Optimization Engineer will develop high-performance software solutions by optimizing deep learning operations and designing new machine learning kernels for the Cerebras hardware system.

The Manufacturing Linux Network Engineer designs and maintains IT/network infrastructure across manufacturing facilities, ensuring high availability and security. They handle Linux server administration, network configuration, and collaborate with various teams for production systems connectivity.