Teams at Cerebras Systems

Lead RTL and microarchitecture design for Cerebras Wafer Scale Engine: author functional specs, develop RTL, synthesize, integrate third-party IP, collaborate with PD, verification and software teams, debug silicon-level functional/timing/power issues, and drive PPA and test/bring-up activities.

Build and lead the inference orchestration layer for a globally distributed ML inference platform. Architect and implement highly available, low-latency systems, own reliability and performance, write production code, drive incident response, observability, capacity planning, and collaborate with ML, infrastructure, and cloud teams on scalable designs.

Lead design and implementation of a globally distributed inference orchestration platform. Drive platform direction, reliability, performance, and production incident leadership. Write and review production code, make high-consequence architectural decisions, and mentor senior engineers while partnering with ML, product, infrastructure, and cloud teams.