Jobs at Black Semiconductor

Drive reliability qualification, failure analysis, and accelerated life testing for integrated graphene photonics products. Design wafer-level test plans, investigate failure mechanisms, monitor optical and electrical performance, conduct root cause analysis using FMEA and 8D, and support compliance with industry standards. Collaborate with design, process integration, product, and quality teams to transition prototypes into production-qualified, reliable products.

Lead high-temperature thermal processing and graphene-growth process development in a semiconductor cleanroom. Responsibilities include tool installation and qualification, recipe development, 300 mm wafer integration, SPC and DOE analysis, thin-film characterization, root-cause troubleshooting, defect reduction, documentation, safety protocols, and team cross-training.

Acts as the interface between business departments and external SAP consultants. The role gathers and translates requirements, supports and maintains the SAP S/4HANA environment, coordinates change requests and minor configuration updates, and drives process improvements across Finance, Logistics, Procurement, and Supply Chain. Responsibilities also include documenting configurations, business processes, testing, and customizations while supporting stable system operations and cross-functional collaboration.

Owns bring-up, qualification, and operation of high-volume 300 mm wafer ATE infrastructure for electronic-photonic integrated circuits. Develops and debugs automated DC, RF, optical, and electro-optical test programs; manages probe card integration; analyzes wafer data; supports yield, reliability, and failure analysis; transfers laboratory methods to production; and improves throughput, accuracy, SPC, supplier qualification, and test documentation.

Own and build the logistics and supply chain function as the company scales toward production. Lead logistics and warehouse teams, manage domestic and international transportation, optimize warehousing, inventory, material flow, and production support, and develop scalable processes. Drive SAP S/4HANA rollout, efficiency and delivery improvements, stakeholder collaboration, dangerous goods handling, import/export compliance, and regulatory adherence across operations.

Develop and optimize graphene transfer, lamination, patterning, wet-processing, and wafer-handling processes for semiconductor devices. Integrate and qualify equipment, establish process windows and specifications, troubleshoot root causes, and support fab startup, production ramp-up, yield improvement, and continuous manufacturing improvement. Collaborate with engineering, manufacturing, suppliers, research partners, and external technology organizations to transfer scalable graphene processes from R&D into production.

Develop and maintain photonic integrated-circuit layout libraries and workflows using Synopsys tools. Support designers in converting photonic devices and circuits into fabrication-ready layouts, perform DRC and LVS verification, resolve layout violations, implement design rules, assemble layouts, and support mask data preparation. The role also requires Python programming, semiconductor design knowledge, and familiarity with photonic or electronic layout software, physical verification tools, and KLayout.

Develops physics-based models and simulation capabilities for graphene photonic devices. Responsibilities include researching device-modeling methods, using TCAD and multiphysics tools, translating mathematical models into Python, extending graphene device models, validating simulations against experimental data, and collaborating across teams. The role requires expertise in semiconductor and solid-state physics, partial differential equations, graphene, photonics, and software development practices.

Own package reliability from mission-profile definition to qualification and release. Assess failure mechanisms, define and run reliability tests, lead failure analysis, work with OSATs and suppliers, and provide data-driven release recommendations.

Plan and execute product qualification campaigns for semiconductor photonic hardware. Develop test PCBs/fixtures with partners, set up and maintain lab equipment, run thermal/electrical/mechanical/environmental tests, collect and analyze data, coordinate with OSATs and external labs, and produce traceable qualification reports to support product release.

Design, simulate, and validate high-speed analog transmitter and receiver circuits (transmit drivers, TIAs, limiting amps, CTLEs). Perform AC/transient/noise/jitter/PVT/Monte Carlo and post-layout simulations. Co-design electrical interfaces with photonics and packaging, support silicon bring-up, lab characterization, debugging, and correlate measurements with simulations to meet OCI Gen1/Gen2 performance targets.

Lead end-to-end ASIC and chiplet development programs combining electronics and photonics. Define milestones, manage schedules, risks, suppliers, and cross-functional execution through validation, qualification, and production release.

Lead analog/RF and high-speed SerDes architecture for CMOS SoCs enabling graphene photonic interconnects. Define PLLs, TIAs, drivers, equalizers, ADC/DACs, CDRs for 112G/224G+ PAM4. Produce PRSs and verification plans, close electrical-to-optical link budgets, own Analog IP roadmap, coordinate with photonics, package and SoC teams, engage customers, and incorporate interconnect standards like PCIe, UCIe, and CXL into architecture decisions.

Own and scale People Operations and Global Mobility: payroll for NL and DE, contracts, HRIS administration, immigration and relocation programs, SOPs and process building, reporting and analytics, external partner coordination, and strategic business partnering to reduce manual workflows and support leadership in a fast-growing international environment.

Lead customer integration of graphene photonic interconnects: guide bring-up, validation, debugging, develop reference designs and FPGA/ASIC demonstration platforms, support pre-sales and post-sales escalations, and feed field insights into product development.

Lead development and qualification of process flows and integration schemes for integrated graphene photonics. Plan, execute, and analyze integration studies, drive process optimization, yield and reliability improvements, and translate data into actionable recommendations. Collaborate cross-functionally and define process specifications for a 300 mm fab while managing projects and change-management for scale-up to volume manufacturing.

Lead hardware architecture for a hybrid electronic–photonic compute engine: define execution units, memory hierarchy, data fabric, interconnects, and hardware/software interfaces; perform quantitative modeling of performance/power/area trade-offs; collaborate across photonics, RTL, physical design, packaging, and software teams; own architecture specification through sign-off for silicon implementation.

Design and implement photonic integrated circuits: own schematic capture, mask layout, PDK-compliant tape-out readiness, DRC/LVS verification, workflow automation with Python, and collaborate with device, simulation, EIC, packaging, and foundry teams to deliver manufacturable PIC blocks and full-chip assemblies.

The Plating Process Engineer will develop and implement advanced plating processes, oversee fab startup activities, and establish specifications and protocols for plating tools in a semiconductor environment.

Lead tool planning and installation for plating capabilities in a semiconductor fab. Ensure safety compliance, drive equipment selection, and implement maintenance programs.