Jobs at Axiado

The ASIC Design Engineer will design and implement SoCs, optimize performance, collaborate with teams, and support chip validation through the design flow.

As an ASIC Verification Engineer, you will lead RTL SoC verification, develop test plans, and collaborate with various teams to ensure successful chip validation.

The Staff ASIC Design Engineer will lead ASIC design projects, implement micro-architecture optimizations, and collaborate across teams to develop silicon products.

The ASIC Design Engineer will develop SoCs, optimize performance and power, collaborate with various teams, and support testing and validation processes.

Design, develop, and maintain BMC software solutions, implementing firmware communication, performing code reviews, and preparing documentation.

Design and maintain BMC software solutions, implement firmware functions, conduct code reviews, and ensure software quality through testing and documentation.

The Silicon Test Engineer at Axiado will develop, debug, and optimize ATE and SLT test programs while collaborating with cross-functional teams to ensure comprehensive test coverage for silicon validation and production.

The NPI Engineer will manage the transition of new products from design to manufacturing, collaborate with teams, analyze data, and improve processes.

Design, develop, and integrate BMC software solutions for system management. Collaborate with customers on technical issues and ensure compliance with security protocols.

Responsible for designing, developing, and maintaining BMC software solutions. Engage in firmware communication, code reviews, and ensure high-quality software through testing and debugging.

The Senior Hardware Engineer will drive product development from concept to production, create hardware specs, and ensure system validation. They will collaborate with cross-functional teams and address technical challenges in embedded computing system design.

Responsible for designing, developing, and maintaining BMC software solutions, ensuring high-quality code through reviews and debugging, and documenting specifications. Requires expertise in various communication protocols and firmware implementation.

The ASIC Verification Engineer will lead RTL SoC/Subsystem verification of ARM based SoCs using UVM methodologies, collaborating across teams for chip validation and production maturity.

The BMC Engineer designs, develops, and maintains BMC software, focusing on firmware communication with peripherals, performing code reviews, unit testing, and documentation.

The Senior ASIC Verification Engineer will lead RTL verification processes for ARM SoCs, develop test plans, and oversee functional verification while collaborating with cross-functional teams.

The Senior FPGA Design Engineer will engage in RTL design, FPGA simulation, system validation, and debug, collaborating with several teams in a fast-paced environment.

Lead the design and development of UEFI firmware for server platforms, focusing on Host-to-BMC communication and integration of security features.

The Senior QA/DV Program Manager will drive execution, delivery, and QA for ASIC SOC and BMC software solutions, coordinating across multiple engineering teams and managing risks and schedules.

The Senior QA Engineer will validate Secure BMC System products by creating test strategies, executing automated tests, and troubleshooting issues. This includes validating BMC software solutions and managing system test requirements using Python for automation.

The ASIC Design Engineer will develop SoCs, micro-architecture design, RTL coding, optimization, and collaborate with multiple teams for ASIC development.