Jobs at Axiado

The Senior Emulation Design Engineer will convert complex SOC designs into emulation environments, validate interoperability with AI servers, and optimize performance. Responsibilities include debugging, integrating IPs, and collaborating with multiple teams.

The Senior QA/DV Program Manager will drive execution, delivery, and QA for ASIC SOC and BMC software solutions, coordinating across multiple engineering teams and managing risks and schedules.

Manage outsourced contract manufacturing and supply chain for AI security products, ensuring timely delivery, quality, and effective cross-functional collaboration while driving cost savings.

The System Engineer will drive AI Server integration, implement firmware features, support customer platform integration, ensure security compliance, and develop BMC software.

The Corporate Controller will lead global accounting, oversee financial reporting, FP&A, ensure compliance, and improve accounting processes in a semiconductor context.

Develop AI-driven cybersecurity solutions, manage ML pipelines, analyze cyber threats using LLMs, and optimize models for edge computing.

The Senior Product Manager will oversee the TCU platform's software, firmware, and AI/ML capabilities, driving cross-functional coordination, defining requirements, and engaging with customers and teams to align on the product roadmap and priorities.

The Senior FPGA Design Engineer will engage in RTL design, FPGA simulation, system validation, and debug, collaborating with several teams in a fast-paced environment.

The Associate Director of Hardware Engineering will lead product development from concept to production, managing a team while ensuring successful design specifications and engineering validation.

Lead operations engineering functions for semiconductor manufacturing, oversee project collaborations, ensure product quality, and manage supply chain communications.

The role involves developing AI-driven cybersecurity solutions, managing machine learning pipelines, and applying advanced threat detection methods.

The ASIC Verification Engineer will lead RTL SoC/Subsystem verification of ARM based SoCs using UVM methodologies, collaborating across teams for chip validation and production maturity.

As an ASIC Verification Engineer, you will lead RTL SoC verification, develop test plans, and collaborate with various teams to ensure successful chip validation.

The ASIC Design Engineer will design and implement SoCs, optimize performance, collaborate with teams, and support chip validation through the design flow.

The ASIC Design Engineer will develop SoCs, micro-architecture design, RTL coding, optimization, and collaborate with multiple teams for ASIC development.

The Senior ASIC Verification Engineer will lead RTL verification processes for ARM SoCs, develop test plans, and oversee functional verification while collaborating with cross-functional teams.

The QA Engineer will integrate testing methodologies, establish test environments, develop automated scripts, and ensure platform performance aligns with customer requirements.

Architect System-on-chips to transform next generation infrastructure products. Develop innovative specifications and collaborate with industry technologists on standards.

Lead the Quality Management System throughout the product life cycle to ensure high-quality semiconductor products. Responsibilities include designing and maintaining QMS, enforcing PLC processes, and managing product quality metrics while collaborating with functional teams and customers.

The Senior QA Engineer will validate Secure BMC System products by creating test strategies, executing automated tests, and troubleshooting issues. This includes validating BMC software solutions and managing system test requirements using Python for automation.