Jobs at Axiado

Lead finance to scale Axiado from late‑stage R&D to high‑volume semiconductor commercialization: run capital raises, FP&A and cash forecasting, standardize manufacturing costing and inventory accounting, manage vendor reconciliations and supply‑chain finance, upgrade ERP, optimize global tax and R&D credits, and ensure audit and compliance readiness.

Drive embedded computing hardware products from concept through production. Responsibilities include system design, hardware specifications, schematic capture in OrCAD, collaboration with layout, mechanical, and signal integrity engineers, lab bring-up, engineering validation, debugging, procurement, and coordinating hardware builds. The role requires board design expertise, knowledge of standard and high-speed interfaces, power converter design, server subsystems, laboratory equipment, and cross-functional communication.

Lead the hardware organization and own TCU embedded-system products from concept through high-volume production. Drive schematic design, lab bring-up, validation, mass-production yields, failure analysis, RMA resolution, supply-chain redesigns, and cross-functional system debugging. Manage senior engineers and contractors, support secure server infrastructure customers, maintain tier-one supplier relationships, and represent the company in OCP and other hardware forums. The role requires deep hands-on circuit design, server-interface, production, and hardware troubleshooting expertise.

Design architecture for System-on-Chips to enhance next-generation infrastructure, collaborating across hardware, software, and system disciplines.

Lead power-aware RTL/SoC verification: execute UPF-based simulations, integrate UPF with UVM testbenches and VIPs, create directed and constrained-random low-power tests, verify power gating/isolation/retention/reset across domains, develop assertions and coverage, support power-aware regression and sign-off, and collaborate with RTL and power architects.

The System Architect will design SoCs for transformative infrastructure products, develop specifications, and collaborate with various tech teams to establish standards.

Architect System-on-chips to transform next generation infrastructure products. Develop innovative specifications and collaborate with industry technologists on standards.

The System Architect will design System-on-Chips for next-generation infrastructure products, define hardware and software specifications, and collaborate with technologists to drive industry standards.

Lead the Quality Management System throughout the product life cycle to ensure high-quality semiconductor products. Responsibilities include designing and maintaining QMS, enforcing PLC processes, and managing product quality metrics while collaborating with functional teams and customers.

Lead all legal matters including corporate governance, board and stockholder affairs, contract negotiation, IP strategy and portfolio management, regulatory and export-control compliance, data protection, cybersecurity controls, risk mitigation, financings, M&A, and oversight of international subsidiaries and local entity compliance.

The Senior Emulation Design Engineer will convert complex SOC designs into emulation environments, validate interoperability with AI servers, and optimize performance. Responsibilities include debugging, integrating IPs, and collaborating with multiple teams.

The Senior FPGA Design Engineer will engage in RTL design, FPGA simulation, system validation, and debug, collaborating with several teams in a fast-paced environment.

The Silicon Test Engineer at Axiado will develop, debug, and optimize ATE and SLT test programs while collaborating with cross-functional teams to ensure comprehensive test coverage for silicon validation and production.

The Staff ASIC Design Engineer will lead ASIC design projects, implement micro-architecture optimizations, and collaborate across teams to develop silicon products.

The ASIC Design Engineer will develop SoCs, optimize performance and power, collaborate with various teams, and support testing and validation processes.

Lead product definition and roadmap for the Trusted Control/Compute Unit (TCU) platform across software, firmware, and on-chip AI/ML. Define PRDs and acceptance criteria, drive cross-functional alignment with hardware and engineering, engage hyperscaler and OEM customers on integration, influence standards, support launches, and grow the PM function.

The NPI Engineer will manage the transition of new products from design to manufacturing, collaborate with teams, analyze data, and improve processes.

Responsible for designing, developing, and maintaining BMC software solutions. Engage in firmware communication, code reviews, and ensure high-quality software through testing and debugging.

Develop and implement SoCs, focusing on micro-architecture design, RTL coding, synthesis, and timing closure, while collaborating with various teams throughout ASIC development.

Design, develop, and integrate BMC software solutions for system management. Collaborate with customers on technical issues and ensure compliance with security protocols.