As a Product Applications Engineer, you'll drive technical support for customers, author technical documents, and ensure successful product integration while collaborating with multiple teams.

Manage ASIC physical design tasks including floor-planning, timing closure, and verification for advanced process nodes. Mentor junior team members.

Manage NetSuite projects, providing support and oversight for implementations, testing, reporting, and user training while driving process improvements.

As a Senior Staff Physical Design Engineer, you'll implement and verify complex digital designs, focusing on physical implementation including timing closure and physical verification for advanced nodes.

The Principal Firmware Engineer will lead firmware development for UCIe chiplets, ensuring design, validation, and integration with multi-functional teams while mentoring junior engineers.

Lead firmware development for UCIe chiplets, collaborating with teams from design to validation, ensuring high-quality firmware through best practices, mentoring engineers, and managing timelines.

The role involves driving backend processes, optimizing design for power and area, and ensuring timing closure and physical verification for IC design.

Responsible for SoC level IP verification, developing verification environments, and analyzing/debugging tasks. Requires strong knowledge of digital verification methodologies and scripting languages.

Design high-speed analog circuits for 100G+ SERDES applications, optimize performance, and collaborate on verification strategies in a team environment.

The IP Release Engineer ensures high-quality silicon for IC chips, manages IP releases, supports QA flows, and collaborates across teams for product quality.

As an IP Application Engineer, you'll support the integration and validation of IPs on SoCs, collaborate with teams, and handle debugging tasks using lab equipment.

The Staff Engineer will carry out physical design tasks for ASIC projects, manage development flows, mentor team members and oversee verification activities.

Lead and manage the ASIC verification team for ARM-based SoC designs, implementing verification strategies and collaborating with cross-functional teams while ensuring comprehensive coverage and mentoring junior engineers.

The Sr. DFT Engineer will develop and support DFT methodologies, architect flows, build verification solutions, and lead a team of DFT engineers.

Develop Interface and Analog IPs for ASIC and external customers, ensuring solid IP development methodologies and supporting multiple customers through hands-on engineering.

The Principal IC Failure Analysis Engineer will analyze failures, improve product yields, and work collaboratively to resolve issues, ensuring reliability and performance.

Develop device interface functions, oversee firmware lifecycle, collaborate on validation requirements, mentor junior engineers, and enhance processes.

As Legal Counsel, you will draft and negotiate various commercial agreements, ensure compliance with laws, manage external counsel, and provide legal advice to various teams.

The Staff Engineer will manage physical design and verification tasks for ASIC projects, mentor junior team members, and ensure correct integration of IP and pad-ring.

Manage semiconductor programs related to high-speed Serdes IP, coordinate with teams and customers, and drive project execution and delivery milestones.