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Performance Engineer Interns conduct quantitative research on exchange and network technologies, design optimization strategies for electronic trading, develop AI agents, ETL pipelines, and Python algorithms, and reverse-engineer and stress-test low-latency systems. They collaborate with traders and hardware and software engineers to improve liquidity-taking, quoting, and ultra-low-latency trading strategies.

Conduct quantitative research on exchange technology and large datasets, design strategies for ultra-low-latency trading, and develop AI agents, ETL pipelines, and Python algorithms. Reverse-engineer and stress-test network and systems technologies, collaborating with traders and hardware and software engineers to optimize liquidity-taking and quoting strategies.

Run a live trading simulation: build and deploy a Python trading bot, convert logic into real-time trades, compete against other teams and IMC bots, apply research-driven thinking, and network with IMC traders. Bring a laptop and a problem-solving mindset. Food, refreshments, and prizes provided.

On-site coding competition where participants solve 20 rapid computer-science problems on IMC's platform, track progress on a live leaderboard, network with IMC technologists, and compete for prizes. Bring a laptop and a problem-solving mindset; event includes food and refreshments.

The Quantitative Developer will develop systems from research to production, build simulation infrastructure, manage feature pipelines, and troubleshoot issues in quantitative trading environments.

As a Software Engineer, you will build AI systems to enhance developer workflows, implementing agents and servers, and ensuring code reliability through evaluation pipelines.

Design, build, and operate big-data and streaming platforms (Kafka, Hadoop, Dremio). Develop, deploy, and monitor data pipelines using Java, Python, Spark/Flink; collaborate on data modeling and ingestion, ensure data integrity and availability, act as a Big Data SME, and perform root-cause analysis.

Design and verify next-generation ASICs for latency-sensitive trading systems. Responsibilities include RTL development in SystemVerilog, verification and testing, debugging, integration, tooling and automation, and cross-team collaboration to meet performance and reliability goals.

Lead end-to-end IT audits globally to assess design and operating effectiveness of internal controls across technical platforms. Provide actionable recommendations, drive change, write clear reports, build relationships, and travel internationally (~25%).

Identify and engage experienced ML and quantitative research talent through creative sourcing channels, build pipelines, perform market mapping, partner with recruiters and hiring managers, and track sourcing metrics to inform hiring strategy.