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The Staff Programme Manager will oversee the delivery of manufacturing test solutions for New Product Introductions, coordinating cross-functional teams and managing dependencies for effective product development.

The Manufacturing Product Engineer will collaborate with various teams to enhance manufacturing processes, address production issues, and apply data-driven methodologies for continuous improvement.

The role involves developing test automation frameworks, translating hardware specifications into tests, and collaborating with engineering teams for AI hardware validation.

The role involves validating and debugging hardware platforms, focusing on LPDDR memory interfaces and working with various engineering teams to ensure system performance and reliability.

Responsible for optimizing yield, quality and cost throughout the product lifecycle, collaborating with multiple teams to improve manufacturing processes and reliability.

The Staff Software Engineer will lead the design and development of profiling tools for optimizing applications on Graphcore hardware, mentor junior engineers, and ensure technical excellence in projects.

Lead validation execution, automation, and quality for silicon and platform products. Develop scalable validation methodologies, automation frameworks, and test infrastructure; drive test coverage, root-cause analysis, release readiness, and cross-disciplinary collaboration. Mentor engineers and influence validation strategy and quality practices.

The Director of Software Architecture leads the software architecture vision for Graphcore’s ML accelerator, managing a team and engaging with stakeholders to ensure alignment with business goals. Responsibilities include defining architecture processes, advocating user experience, and mentoring the architecture team.

Lead post-silicon debug and validation for AI compute SoCs and systems. Drive debug methodologies, reproduce and resolve complex silicon/firmware/software issues, develop automated debug and validation infrastructure, analyze logs/traces/telemetry, define validation metrics, and coordinate cross-functional teams to ensure silicon and product readiness.

Lead end-to-end signal integrity analysis and optimization for blade- and rack-level high-speed compute platforms. Perform SI/PI simulations and hands-on lab validation (VNA, TDR, BERT, oscilloscopes), correlate measurements with simulations, debug margin gaps, and collaborate with silicon, package, board, connector, cable, ODMs and vendors to improve I/O channel performance and produce technical validation reports.