Top Engineering Jobs

The IP Verification Engineer is responsible for developing testbenches and test suites, writing test plans, and collaborating with design teams to ensure quality verification of complex subsystems and SoCs.

Lead the design of integrated robotic systems, managing system architectures and driving milestones from initial development to full integration, collaborating with teams across disciplines.

Senior technical advisor supporting SoC designs using Arm IP (CPU, GPU, NPU, CoreLink, CoreSight). Guide IP selection/configuration, system integration, power/performance/scalability discussions, resolve cross‑IP issues, and partner with Sales, Product Marketing, Support, and Engineering to drive design wins.

Provide technical mentorship and support to partners integrating Arm CPUs and System IP into SoCs. Perform RTL simulation-based debugging, SoC build reviews, deliver training, influence IP development, test IP, and create knowledge-base content and tooling to improve partner outcomes.

The Design Verification Engineer is responsible for the verification of memory controllers, developing testbenches, and debugging functional errors in RTL models.

The role involves supporting the delivery of soft IP, optimizing designs, ensuring partner success, and developing methodologies for implementation analysis.

Develop and support methodologies for 3DIC and 2.5D physical design, focusing on timing, power, thermal, and multiphysics analysis with cross-team collaboration.

The Director of Engineering - CAD will lead the development of SoC design methodologies, focusing on power delivery and implementation strategies across advanced technology nodes. Responsibilities include collaborating with teams to optimize designs and drive innovations in automation for complex systems.

Lead the development of next-generation system architectures, drive technology objectives, and collaborate with teams to ensure alignment in product goals.

Lead definition of system and SoC architectures for infrastructure markets, driving topology, security, boot, IO and memory designs. Guide cross-team development, review microarchitectural specs and test plans, support firmware/middleware/OS integration, define performance and power targets, and work with performance analysis to meet latency, bandwidth, QoS, and next-generation memory goals.