Top Engineering Jobs

Engineering internship opportunities span hardware and chip design, testing and validation, systems performance, AI and machine learning, software and tools, technical enablement, and technical product programs. Interns may build, test, debug, model, analyze, or improve technical systems using programming, hardware, simulation, data, and engineering tools. Candidates must be enrolled in a relevant technical degree program and return to their studies after the internship.

Arm’s Graduate Engineering Pathways Program offers early-career opportunities across hardware and chip design, testing and validation, systems performance, AI/ML, software tools, technical enablement, and technical product programs. Graduates work on real products, solve technical challenges, learn new technologies, and collaborate with experienced teams. Candidates must be pursuing a relevant technical or quantitative university degree and demonstrate hands-on technical problem-solving through coursework, research, internships, projects, or open-source work.

Design and integrate PCIe, CXL, and other IP subsystems for SoCs. Develop micro-architecture specifications and RTL, perform design checks, fix bugs, and collaborate with verification, performance, backend implementation, and project management teams. Support floor planning, constraints, timing closure, and design methodology improvements while guiding team members.

Develop functional verification strategies for sophisticated Arm SoCs and compute subsystems. Create test plans, SystemVerilog/Verilog testbenches, and tests; verify PCIe/CXL, DDRx/LPDDRx, HBM, performance, and SoC RTL integration. Debug failures, improve verification methodologies, collaborate on architecture and microarchitecture, support emulation platforms, and guide junior engineers. The role also involves coordinating project activities, plans, and schedules with Project Management.

Senior SoC Verification Engineer role at Arm. The provided posting contains salary and company policy information but no detailed responsibilities or qualification requirements.

The engineer will verify PCIe and CXL subsystems, collaborate on testplans, develop UVM testbenches, and improve verification methodologies.

Architects, implements, and validates design-for-test techniques for Arm SoCs and subsystems. Responsibilities include DFT insertion, RTL and gate-level simulation, ATPG pattern generation, coverage debugging, DFT timing analysis, scan insertion, timing closure, ATE test validation, silicon debug, and characterization. The role collaborates with RTL, verification, physical implementation, test, and product engineering teams throughout development and tape-out.

The IP Verification Engineer is responsible for developing testbenches and test suites, writing test plans, and collaborating with design teams to ensure quality verification of complex subsystems and SoCs.

The Senior/Staff Design Verification Engineer will be responsible for design verification in coherent interconnects. Specific responsibilities are not detailed, but expertise in this area is expected.

Develop and improve front-end ASIC/SoC build methodologies, CAD flows, and automation from RTL development through implementation handoff. Build production-quality infrastructure for RTL quality, verification, IP management, regression, and release readiness. Collaborate with engineering teams and EDA vendors to resolve bottlenecks, evaluate AI and automation technologies, and drive methodology adoption across projects.