Top Engineering Jobs

Design and maintain standard cells for DRAM products; collaborate on architecture, perform characterization, and develop automation tools; enhance design using AI.

The Process Safety Engineer develops and implements the Process Safety Management program, leading risk assessments and ensuring safety compliance in semiconductor manufacturing.

Lead global Field Applications Engineering engagements as primary technical liaison for key customers. Manage FAE teams, define system architecture and memory configurations, drive design wins, resolve integration and performance issues, and align cross-functional partners to enable revenue and customer adoption.

As a Facility Engineer, you will manage facility systems, oversee construction projects, ensure safety protocols, and collaborate with teams to upgrade and maintain facilities.

The Dry Etch Process Develop Engineer will develop and optimize plasma etch processes for memory devices, collaborating with cross-functional teams to enhance manufacturing techniques and improve process metrics.

Design and lead Salesforce-centric technical solutions and integrations for IT Sales. Drive architecture, API design, data migration, CI/CD pipelines, security/compliance, third-party integrations, and stakeholder engagement. Provide technical leadership, mentor team members, and manage solution delivery across build, test, and deployment phases.

Lead the design of advanced analog circuits for High Bandwidth Memory products, ensuring performance, integration, and compliance. Provide technical leadership across various teams and processes.

Lead and execute advanced analog, mixed-signal, and custom digital layout for blocks and full chips. Perform physical verification (LVS/DRC and related checks), develop digital layouts with auto place-and-route tools, apply SKILL coding and automation, mentor junior engineers, manage scheduling and delivery across projects, coordinate with global teams, and use AI to reduce layout effort and improve quality.

The role involves defining innovative memory technologies, leading technology integration, optimizing device performance, and analyzing data for semiconductor advancements.

Lead development, optimization, and sustainment of EUV photolithography processes and scanner fleets in high-volume DRAM manufacturing. Ensure process stability via SPC, overlay/CD optimization, defectivity reduction, and tool matching. Drive rapid excursion response, root-cause analysis, CAPA, and continuous improvement using DOE, statistical methods, and AI-enabled tools to improve yield and throughput.