Top Engineering Jobs

Lead development, optimization, and integration of CMP processes and equipment for next-generation semiconductor packaging. Drive equipment evaluation, yield and quality improvements using DOE/SPC/FMEA, collaborate with global R&D, sites, and suppliers, and support mass-production transfer and cost/productivity initiatives.

Lead process integration efforts for next-generation 3D NAND: identify yield gaps, develop process solutions, coordinate R&D-to-manufacturing transfers, run experiments, support ramp and qualification, and apply AI to optimize workflows and decisions.

The role focuses on quality monitoring and risk management using data analytics in semiconductor manufacturing, supporting new product introduction and process improvement.

The PI Engineer drives process integration for HBM products during NPI, collaborating cross-functionally to ensure readiness and resolve issues while leveraging AI tools for efficiency.

As a Fab Engineer, you will start up, develop, and optimize processes to improve product quality, resolve manufacturing problems, and manage supplier relations to achieve quality and cost objectives.

The role involves setting up dry etch equipment, collaborating with process development, optimizing hardware, and leading innovation projects. It requires strong communication and project management skills.

The role focuses on process development and optimization for Plasma-CVD and Diffusion processes in NAND Flash products. Responsibilities include designing experiments, characterizing processes, collaborating with multi-functional teams, and troubleshooting issues in manufacturing.

Senior technical leaders in process engineering will drive innovation, mentor engineers, optimize processes, and collaborate on technology transfer and yield improvements.

Develop signal integrity architectural strategies for high-speed interfaces, conduct feasibility analyses, create channel models, and translate insights into requirements.

Responsible for verification of DRAM critical timings, guiding verification efforts, analyzing full chip designs, and developing verification methodologies.