Top Engineering Jobs

The DMTS Dry Etch Engineer will lead advancements in NAND technology, develop dry etch processes, mentor engineers, and represent Micron at technical forums. Responsibilities include collaborating in multi-functional teams, solving structural problems, and influencing technology roadmaps.

As a Validation Engineer, you will develop and execute validation test plans for SSD devices, analyze results, and assist in debugging. You will also perform failure analysis and enhance customer integration experiences.

As a Senior Engineer in the Cost division, you will develop cost management strategies, supervise spending, and collaborate with teams to improve budgeting processes.

As an Equipment Maintenance Technician, you will monitor and maintain manufacturing equipment while collaborating with teams to optimize performance, safety, and cleanliness in a semiconductor environment.

As an AMHS Application Engineer, you will design, develop, test, and support automated systems and reporting systems, ensuring compliance with IT processes and providing on-call support.

The WET/CMP Shift Engineer will establish and improve process conditions, upgrade capabilities, and manage semiconductor equipment parameters to enhance production processes.

Design IC layout for leaf cells, standard cells, and sub-blocks; interpret DRC/LVS and physical verification; use circuit simulation and layout tools; plan and own tasks to meet timelines; collaborate with cross-functional teams while developing semiconductor and analog layout skills.

Define and implement NAND Flash reliability test flows, perform large-scale statistical analysis and electrical failure analysis, develop countermeasures and qualification controls, collaborate with cross-functional teams, integrate AI-assisted tools, support customer reliability inquiries, and drive strategic reliability initiatives to ensure robust NAND product performance and prevent field escapes.

The Sr. Design Verification Engineer will validate complex SoC designs, develop verification environments using UVM and SystemVerilog, enhance Python-based testbenches, and collaborate closely with design teams to ensure high-quality silicon delivery.

The role involves planning facility changes, coordinating with engineering firms, managing construction contracts, and ensuring compliance with safety codes and regulations.