Top Engineering Jobs

Develop and modify embedded firmware and interface software for custom semiconductor manufacturing equipment. Program in C, C++, Bash, and Python across bare-metal and Linux environments. Collaborate with software, electrical, controls, and mechanical engineers on equipment design, manufacturing, and production support. Perform hands-on hardware debugging using schematics, datasheets, timing diagrams, and laboratory instruments to diagnose system-level issues involving embedded systems, signals, registers, and hardware interfaces.

Develop and verify analog and digital DRAM physical layouts using EDA tools such as Cadence and Calibre. Collaborate with design and build engineering teams on floorplanning, array and peripheral layouts, verification protocols, and custom or automated layout techniques. The intern will gain hands-on experience in semiconductor layout, physical verification, memory technologies, and industry-standard design workflows.

Provides global technical leadership for semiconductor manufacturing equipment performance across multiple sites. Leads root cause analysis of yield, defectivity, reliability, stability, matching, and availability issues; improves tool capability, cost of ownership, productivity, and maintenance. Partners with technology development, process integration, suppliers, and leadership to enable technology nodes, volume ramps, equipment standardization, and hardware improvements. Mentors engineers and drives deployment of Best Known Methods.

Leads global semiconductor wet-process productivity, yield, quality, cost, and sustainability improvements. Drives process and hardware optimization, chemistry and technology qualification, defect and particle reduction, equipment performance benchmarking, tool start-up acceptance criteria, CIP roadmaps, IoT-based excursion prevention, and energy, water, and waste reduction initiatives. Collaborates with suppliers, facilities, and cross-functional teams to mature equipment, establish process parameters, and implement scalable solutions across Micron sites.

Investigate, improve, and maintain semiconductor metrology measurement recipes in a high-volume fabrication environment. Resolve recipe and equipment issues, collaborate with process engineering teams, create recipes for new part types, manage documentation and WIP, monitor KPIs and holds, respond to production events, and improve cycle time and recipe availability. The role supports shift operations and may involve 24x7 manufacturing coverage.

Owns digital physical design from synthesized netlist through GDSII for high-performance HBM products. Responsibilities include floorplanning, placement, clock-tree synthesis, routing, timing closure, power integrity, physical verification, ECOs, low-power implementation, and full-chip integration. The engineer collaborates with RTL, DFT, CAD, verification, and EDA vendors, while using TCL, Python, Perl, and shell scripting to improve design flows and methodology.

Supports thin films semiconductor equipment engineering projects involving equipment and process data analysis, optimization, structured experiments, technical documentation, and cross-functional collaboration. The intern investigates equipment hardware, process interactions, and operating conditions while applying data analytics, artificial intelligence, and machine learning tools to improve engineering workflows and equipment performance.

Design and develop layouts for analog and mixed-signal circuits. Oversee project planning and guide junior team members while ensuring layout quality.

Lead semiconductor process development and optimization during new-product transfers to high-volume manufacturing. Collaborate with technology development, manufacturing, suppliers, and safety teams to improve yield, quality, performance, and cost. Develop process-control and roadmap models, support hardware and module optimization, benchmark suppliers, and apply AI, LLMs, and agentic workflows to manufacturing processes. International travel to manufacturing and development sites is required.

The Lead Principal Engineer will lead advanced IC layout development, ensuring compliance with design rules and methodologies while mentoring engineers and collaborating across teams.