Top Engineering Jobs

Lead architecture and development of embedded SoC software for seeker systems using Xilinx SoC FPGAs and ARM-based SOMs. Drive SDLC, mentor engineers, integrate with hardware and test teams, select/deploy embedded OSes, and enforce security-focused development practices for precision munitions.

Lead design verification for FPGA/ASIC signal-processing and control systems: plan and build SystemVerilog/UVM/OVM/VHDL self-checking, constrained-random testbenches; develop test plans; collect/analyze coverage; create reusable VIP; lead and mentor DV teams; drive process improvements and execute schedules.

Design, develop, and deploy enterprise web applications, network infrastructure, and cloud services. Implement full-stack features (front-end and Java Spring back-end), manage RDBMS/NoSQL databases, write and execute tests, and apply DevOps/AWS practices. Collaborate in teams to troubleshoot, optimize, and deliver secure, scalable solutions for a government defense customer.

Lead and architect FPGA design verification efforts using SystemVerilog/UVM/OVM and VHDL. Develop constrained-random, metric-driven test plans, create reusable VIP, collect/analyze coverage, mentor junior engineers, lead small-to-medium DV teams, and drive process improvements for Electronic Warfare FPGA systems.

Serve as an ILS/IPS engineering SME driving Model Based Engineering/Product Support practices. Develop logistics models and deliverables (LORA, MTA, spares, provisioning, SERD), use MagicDraw/Cameo and common ILS tools, collaborate across disciplines, create training/best practices, and support MBPS implementation for defense systems.

Lead FPGA design verification for Electronic Warfare systems: architect and implement SystemVerilog/UVM/OVM or VHDL self-checking testbenches, develop constrained-random test plans, collect/analyze coverage, create reusable Verification IP, lead and mentor DV teams, drive process improvements, and execute test plans to schedule. On-site role requiring Secret clearance eligibility and 8+ years of experience.

Lead design verification for FPGA/ASIC systems using SystemVerilog/UVM and/or VHDL. Plan and implement constrained-random, metric-driven test plans, build self-checking testbenches and reusable VIP, collect/analyze coverage, mentor engineers, lead DV teams, and drive process improvements for Electronic Warfare systems.

Lead design verification for FPGA signal-processing and control systems: plan and build SystemVerilog/UVM or VHDL self-checking testbenches, create constrained-random metric-driven test plans, collect/analyze coverage, develop reusable VIP, mentor engineers, lead DV teams, and improve verification processes.

Develop training materials, manage curriculum creation, and design e-learning modules for OSINT skills. Support instructional development and establish new tradecraft TTPs.

Lead and manage a team of ~10 electrical engineers, oversee hiring, performance development, and hardware program execution. Ensure hardware lifecycle processes (design, verification, integration, production support), drive scope and decision-making, chair design reviews, monitor execution with metrics, and support proposals and bids to capture new business.