Top Perl Jobs

Responsible for researching, designing, and deploying network technologies for Fiber to the Premise broadband infrastructures. Collaborate with multiple departments to configure and implement IP routing and access networks, provide technical expertise, and develop architectural designs and documents. Engage with clients and partners, support sales efforts, and evaluate new technologies to enhance service delivery.

The Senior Physical Design Engineer will be responsible for the physical design of high-performance CPUs and AI architectures, overseeing tasks from synthesis through to tapeout. They will collaborate closely with various teams, ensure timing closure, and employ innovative design techniques for performance enhancement.

The CPU Core Performance Verification Engineer will develop test plans and stimuli for performance verification of CPUs, perform simulations and debugging, work on industry standard and open-source workloads, and collaborate with design and architecture teams to ensure CPU performance and quality.

Tenstorrent is seeking a CPU core level feature/testplan verification engineer responsible for ISA and microarchitectural verification. Responsibilities include functional verification, testplanning, stimulus development, and regression debug. The role is hybrid and based in Austin, TX or Santa Clara, CA.

The SLT Test Engineer will own the system-level testing to enhance the quality and reliability of GroqCloud by designing and validating tests, collaborating with other teams, and automating SLT tests for improved manufacturing processes.

The ASIC Design Engineer at Infinera will be responsible for controlling subsystem development in large mixed signal ASICs, defining control plane specifications, optimizing micro-architecture, and providing layout support for quality product development. The role requires solid ASIC design skills and experience with various protocols and interfaces.

As a Principal Application Engineer at Alphawave Semi, you will provide first-line post-sales support for Ethernet and PCIe serdes IPs, assist with customer integration and silicon bring up, and collaborate with internal R&D teams. You will also develop APIs and ATE vectors and ensure efficient problem resolution for customer issues.

The Senior ASIC/VLSI Synthesis and Design Engineer will develop complex digital designs for high-performance ASICs/SoCs. Responsibilities include optimizing design for power, performance, and area, performing timing closure, gate level simulation, and power analysis, and collaborating with design teams. The candidate will also implement DFT flows and address design issues through various methodologies.

The role involves silicon design verification, developing tests to ensure functional correctness using assembly, C/C++, and SystemVerilog. Responsibilities include writing assertions, creating a test bench, investigating test failures, and enhancing verification workflows. The position requires collaboration with various engineering teams.