Top Engineering Jobs

Support Archibus system administration and data maintenance, update space occupancy, develop custom reports and system integrations, and perform frontend and backend web development tasks including wireframing, prototyping, debugging, documentation, and upgrades.

Support Archibus system administration and data maintenance, update space occupancy, develop reports and integrations, perform frontend/backend web development tasks, and assist with debugging, documentation, and application upgrades.

Technical individual contributor leading full-stack project architecture and delivery. Write and review code across frontend and backend, design scalable serverless/microservice systems, optimize APIs and databases, use AI-assisted tooling daily, mentor engineers, partner with product, and champion testing, CI/CD, performance, and security best practices.

Lead a global team of 40+ to manage corporate network, server, productivity tools, and MDM. Define roadmaps, metrics, budgets, enforce quality/testing standards, drive security-first culture, mentor engineers, and collaborate across organizations to deliver reliable infrastructure and developer productivity tools.

Lead API strategy and architecture for Product Engineering, defining standards (OpenAPI, auth, error models, versioning), governance, reference architectures, and intake/prioritization. Drive cross-team API reviews, partner with platform teams, mentor senior engineers, evaluate tooling options, and ensure APIs are agent-ready, observable, and data-safe.

As a Cloud Engineer, you will manage cloud infrastructure, collaborate on best practices, automate processes, and ensure service reliability for U.S. Federal Government contracts.

Lead cloud strategy, architecture, migration, and automation for public cloud. Design secure, scalable IaC-driven deployments (Terraform/Ansible), CI/CD pipelines, and cloud governance. Mentor engineers, optimize performance and costs, collaborate with vendors, and support U.S. federal contracts requiring U.S. citizenship and potential TS/SCI polygraph clearance.

Develop and extend UVM-based functional verification environments, add features, ensure customer configurations pass regressions, support customers, maintain functional and code coverage, and ensure designs meet technical and quality metrics. Focus includes memory controller verification and protocols like DDR/LPDDR/AXI/CHI-E.

Serve as a technical evangelist for Cadence analog design tools and agentic workflows. Demonstrate product capabilities to customers, resolve customer issues with application engineers, advocate customer needs to R&D, and help define improved use models and user interfaces to advance analog/RF/mixed-signal circuit design workflows.

Develop AI/ML technologies and tools to accelerate standard-cell library characterization. Build infrastructure for characterization data mining and model library cells for aging and variation effects. Maintain and enhance C++ applications on Unix/Linux, design data structures and algorithms, and follow software quality and engineering processes.

Own and develop Cadence-based RTL-to-GDS physical design flows for RDU chips. Maintain and enhance Genus/Innovus/Cerebrus toolflows, script automation (TCL/Perl/Python), collaborate with physical designers and tool vendors, and ensure compliance with advanced TSMC node design rules (3nm and below).

Lead architecture, microarchitecture, RTL design, and technical direction for scalable Network-on-Chip IPs for FPGA platforms. Develop RTL, prototypes, simulation models, and software bring-up; optimize for power, performance, area, and reliability. Guide verification, collaborate with cross-functional teams, mentor engineers, and apply EDA and AI-enabled automation to meet project schedules and quality goals.

Lead and scale a global software IP engineering organization to define strategy, architecture, and delivery of FPGA software IP, libraries, SDKs, drivers, and platform technologies across embedded, AI/ML, networking, DSP, security, and system management. Partner with product, hardware, and customers, drive architecture and CI/CD practices, ensure quality, schedules, metrics, and cross-functional execution for FPGA platform adoption.

Develop and execute verification plans for FPGA/SoC blocks and subsystems using SystemVerilog/UVM. Build reusable verification environments, constrained-random and directed tests, assertions, and coverage models. Debug RTL issues, run regressions, automate verification infrastructure, and collaborate with design, firmware, emulation, and post-silicon teams to ensure functional correctness and product bring-up.

Design and develop freight car pneumatic brake components from concept through production. Create 3D models and drawings, prepare design and validation documentation, plan and execute product validation tests, set up instrumentation and data acquisition, analyze test data, support manufacturing/quality/sourcing, perform FMEA, and produce customer-facing documents and engineering change notices.

Design, implement, and document robust manufacturing processes, tooling, and work instructions. Monitor production, drive quality and continuous improvement using lean/Six Sigma, support equipment troubleshooting, train operators, and collaborate cross-functionally to launch products and reduce costs.

Lead reliability engineering for power generation products: perform FMEA, failure investigations, statistical analysis, reliability testing, supplier qualification, corrective actions, and cross-functional improvements to reduce field failures and improve product robustness.

Design, execute, and scale system- and board-level validation for sensor and compute platforms. Build automated test infrastructure and fixtures, run mechanical/thermal/environmental/reliability tests, perform hardware bring-up and stress testing, drive failure analysis, define validation plans across cross-functional teams, and support EVT/DVT/PVT during NPI.