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The Role
Develop verification plans and test content for next-generation USB IP. Build testbench infrastructure including monitors, scoreboards, checks, and BFMs; create coverage points and assertions; debug failing tests; improve validation efficiency and support SoC and subsystem validation environments.
Summary Generated by Built In
Job Details:Job Description: Passionate IP design Verification Engineer who is motivated to work on fast moving USB IP development across various Client products. The engineer will have an opportunity to define a robust and high-quality test coverage plan to validate new generations of USB IP and challenging new architectural features. The responsibilities cover:
- Scoping and development of validation test plans for new architectural features and next generations USB IP development.
- Developing test contents, coverage points and assertion checks.
- Developing testbench infrastructure (monitors, scoreboards/checks, BFMs, etc) to close on validation coverage.
- Finding and implementing correct measure for failing tests.
- Continue to strive for innovation in problem-solving to improve test coverage in efforts to minimize project execution time while increasing efficiency.
- Understanding SoC/Subsystem validation environment, and providing IP validation support.Qualifications:Required Qualifications
- Bachelor's degree in Electrical and Electronics Engineering, Computer Engineering, or a related field.
- 0-1 years of hands-on experience in RTL design verification with demonstrated skills gained through internships, academic projects, coursework, or hands-on training.
- Familiarity with System Verilog for design verification.
- Basic knowledge of Verilog or VHDL RTL design.
- Strong analytical and debugging skills, and creative in problem solving.
- Effective communication, collaboration, and initiative in diverse team environments.
- Positive energy and motivation to learn and adapt to evolving IP technologies and environments.
Preferred Qualifications
- Understanding of USB protocol fundamentals.
- Exposure to OVM/UVM verification methodology.
- Hands-on experience with AI coding assistants (GitHub Copilot, ChatGPT, or similar).
- Ability to critically evaluate AI-generated outputs for correctness.
If you're passionate about driving innovation in high-speed IO technologies and eager to contribute to Intel's next-generation advancements, we encourage you to apply and join our team.
Job Type:College GradShift:Shift 1 (Malaysia)Primary Location: Malaysia, PenangAdditional Locations:Malaysia, KulimPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- Bachelor's degree in Electrical and Electronics Engineering, Computer Engineering, or a related field
- 0–1 years of hands-on RTL design verification experience through internships, academic projects, coursework, or training
- Familiarity with SystemVerilog for design verification
- Basic knowledge of Verilog or VHDL RTL design
- Strong analytical and debugging skills
- Creative problem-solving ability
- Effective communication, collaboration, and initiative in diverse team environments
- Motivation to learn and adapt to evolving IP technologies and environments
- Understanding of USB protocol fundamentals
- Exposure to OVM or UVM verification methodology
- Hands-on experience with AI coding assistants such as GitHub Copilot or ChatGPT
- Ability to critically evaluate AI-generated outputs for correctness
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
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