Technology Enablement Engineer, Electrostatic Discharge/Latch-up (2026 New College Graduate)

About GlobalFoundries

GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.
 

New College Graduates Overview:

We offer many full-time employment paths for recent graduates, which provide accelerated training in a fast-paced work environment, cross-functional working opportunities, and talent mobility. New college graduates are provided with mentorship, networking, and leadership opportunities, which give our new team members life-long connections and skills.​
 

Summary of Role:

GlobalFoundries is seeking an experienced ESD/LU technology enablement engineer to work on our advanced technology nodes delivering ESD/LU protection designs/solutions and enablement. 

The ideal candidate will have strong technical skills and excellent teamwork.  The position will require strong interaction with many teams inside of GlobalFoundries to enable ESD/LU technology milestones and customer solutions.
 

Essential Responsibilities include:

• Develop ESD and Latch up protection device/circuit solutions for GlobalFoundries differentiated technology portfolio
• Design test macros for electrical characterization and JEDEC qualification.  Define test plans. Execute qualification plans per industry standards.
• Analyze electrical test data using languages such as Python and R
• Develop ESD/ Latch-up-related physical ground rules
• Develop supporting documentation, such as user guides and application notes
• Submit and track failure analysis samples to understand observed failure and defect modes
• Ensure correct process monitors are in place for robust ESD/Latch-up manufacturing
• Collaborate closely with Quality, Reliability, and Technology teams for technology qualification
• Work with circuit IO Design Teams to co-optimize I/O and ESD performance
   

Other Responsibilities:

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
   

Required Qualifications:

• BS or MS in Solid State Physics, Electrical Engineering, or other relevant engineering discipline 
• Working knowledge and experience with semiconductor process fabrication flow, nanofabrication, solid state and semiconductor device physics and design of experiments (DOE) methodology.   
• Familiarity with semiconductor physical design including electrical test structure design.   
• Practical experience using Electronic Design Automation [EDA] tools such as Cadence Virtuoso and Mentor Calibre
• Strong data analysis, data mining and problem-solving skills.    
• Strong interpersonal skills; team player; able to work effectively in a dynamic, fast-paced environment. 
• Travel - Up to 10%
• Fluency in English Language – written & verbal.
   

Preferred Qualifications:

• Prior related internship or co-op experience.
• Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
• Project management skills, i.e. the ability to innovate and execute solutions that matter; the ability to navigate ambiguity.
• Strong written and verbal communication skills
• Strong planning & organizational skills
   

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Expected Salary Range

The exact Salary will be determined based on qualifications, experience and location.