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The Process Design Kits (PDK) team is part of Intel's larger Design Technology Platform (DTP) Organization and is focused on pathfinding and development of advanced memory technology. These circuits enable best-in-class memory collateral, IP and innovative product design across all generations of Intel process technology. At Intel, DTP is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable Intel's internal and external customers to get to the market faster with products that include high-performance, high-density, low-power memory at the leading edge of the technology curve and implemented in Intel's advanced CMOS process technologies.
We are seeking an experienced Technical Program Manager to drive cross-functional collaboration and oversee the planning, development, implementation, and release of Process Design Kits (PDKs). This role requires strong technical expertise, exceptional program management skills, and the willingness to influence stakeholders and matrixed teams across multiple organizations. The successful candidate will lead complex programs, manage dependencies, mitigate risks, and ensure successful execution from requirements through release.
Key Responsibilities
Lead highly matrixed, cross-organizational teams responsible for the development, implementation, enhancement, and release of PDKs.
Drive program execution across all phases of the project lifecycle, from requirements definition through deployment and release.
Coordinate and align activities among multiple teams, projects, and stakeholders to ensure seamless integration and execution.
Provide leadership and guidance to cross-functional teams, including technical leads, engineering managers, and key stakeholders.
Establish program objectives, priorities, schedules, and deliverables while balancing technical requirements with business objectives.
Serve as the primary interface between engineering teams, business stakeholders, and leadership.
Identify and resolve program risks, issues, and obstacles while driving timely decision-making and execution.
Define project scope, resource requirements, dependencies, milestones, and cost estimates.
Develop, maintain, and communicate program schedules, ensuring progress is tracked and reported effectively.
Drive risk management activities and implement strategies to achieve program goals efficiently and on schedule.
Ensure adherence to quality standards, process requirements, and budget expectations.
Optimize resource utilization across business functions and partner organizations.
Influence and contribute to cross-organizational strategies that support business and technology objectives.
Demonstrate a strong understanding of semiconductor technology, PDK architecture, development methodologies, systems, and engineering processes.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
- Candidate must possess a master’s degree with 8+ years of experience in Electrical Engineering or related field.
- 6+ years of experience in:
- Silicon IP hardware design / SoC (System on Chip) hardware design and/or PDK components development/validation.
- Delivering large-scale technical projects from concept through release.
- Program management methodologies, risk management, and stakeholder engagement.
Preferred Qualifications
- PMP, PgMP, Agile, Scrum, or related program management certifications.
- 5+ years of experience:
- Managing complex technical programs in a matrixed, cross-functional environment.
- Coordinating multiple teams, dependencies, and competing priorities
- Process Design Kits (PDKs) components development or validation.
- Collaborating with foundries, OSATs, EDA vendors, and design enablement teams to support technology development, PDK delivery, silicon bring-up, or product qualification activities. Knowledge of product development lifecycles, design methodologies, and release processes.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $160,980.00-311,040.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- Master's degree in Electrical Engineering or a related field
- 8+ years of professional experience
- 6+ years of experience in silicon IP hardware design, SoC hardware design, and/or PDK component development or validation
- 6+ years of experience delivering large-scale technical projects from concept through release
- 6+ years of experience with program management methodologies, risk management, and stakeholder engagement
- PMP, PgMP, Agile, Scrum, or related program management certification
- 5+ years of experience managing complex technical programs in a matrixed, cross-functional environment
- 5+ years of experience coordinating multiple teams, dependencies, and competing priorities
- 5+ years of experience in PDK component development or validation
- Experience collaborating with foundries, OSATs, EDA vendors, and design enablement teams
- Knowledge of product development lifecycles, design methodologies, and release processes
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
Intel Insights
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