Technical Lead Package Platform Engineer

Posted 3 Days Ago
Be an Early Applicant
San Jose, CA, USA
In-Office
160K-200K Annually
Entry level
Big Data • Information Technology
The Role
Lead advanced FCBGA package development from concept through NPI, qualification, and high-volume manufacturing. Manage substrate suppliers and OSAT partners while overseeing schedules, quality, yield, manufacturing readiness, reliability qualification, warpage improvement, and customer quality issues. Drive root cause and failure analysis, corrective actions, and cross-functional execution. Contribute expertise in advanced packaging, including Co-Packaged Optics and Near-Packaged Optics.
Summary Generated by Built In

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Position Summary 

We are seeking a Lead Package Engineer to drive the development, qualification, and manufacturing of advanced FCBGA packages. This role will drive package development from concept through NPI, qualification, and high-volume manufacturing, with strong ownership of technical execution, supplier management, project management, and package-related customer quality issues. 

The successful candidate will work closely with package design, Product Engineering, Program Management, Quality, Marketing, substrate suppliers, and assembly OSAT partners to deliver robust, manufacturable, and reliable package solutions. 

Key Responsibilities 

  • Lead FCBGA package NPI development from concept and die netlist through package design, assembly development, qualification, and production release. 
  • Provide technical leadership in FCBGA assembly manufacturing processes and laminate substrate technologies. 
  • Manage technical execution with substrate suppliers and assembly OSAT partners, including schedule, quality, manufacturing readiness, yield improvement, and issue resolution. 
  • Lead technical project management activities, including project planning, milestone tracking, risk assessment and mitigation, issue escalation, and cross-functional execution. 
  • Collaborate with Package Design, Product Engineering, Program Management, Quality, Marketing, and other internal teams to ensure successful product development and launch. 
  • Lead package reliability assessment and qualification planning for FCBGA products, including large-body packages. 
  • Support system-level reliability assessment and risk mitigation for large-size FCBGA packages. 
  • Lead investigation and resolution of customer returns and field quality issues related to package assembly processes, materials, and workmanship quality. 
  • Drive root cause analysis, failure analysis, containment, corrective actions, and recurrence prevention in collaboration with internal teams, material suppliers, substrate suppliers, and OSAT partners. 
  • Support package and substrate warpage characterization, analysis, and improvement, including the impact of materials, package architecture, and assembly processes. 
  • Contribute technical expertise to advanced packaging technologies, including Co-Packaged Optics (CPO) and Near-Packaged Optics (NPO). 

Required Qualifications 

  • Strong experience in FCBGA assembly manufacturing processes and laminate substrate technologies. 
  • Proven NPI development experience for advanced flip-chip packages, from early package definition through qualification and production release. 
  • Experience with package implementation from die netlist to flip-chip package design and manufacturing. 
  • Demonstrated experience managing substrate suppliers and assembly OSAT partners. 
  • Strong technical project management skills, including schedule and milestone management, technical risk assessment, issue resolution, and cross-functional execution. 
  • Demonstrated ability to lead and collaborate across Product Engineering, Program Management, Quality, Marketing, Design, and external supplier teams. 
  • Experience managing and resolving customer returns and field quality issues related to semiconductor packaging, particularly package assembly processes, material quality, and supplier workmanship. 
  • Strong problem-solving skills with experience in root cause analysis, failure analysis, containment, corrective actions, and recurrence prevention. 

Preferred Qualifications 

  • Experience with Cadence Allegro Package Designer (APD) or equivalent package design tools. 
  • Strong knowledge of FCBGA package reliability mechanisms, test methodologies, and qualification requirements. 
  • Experience developing and executing qualification plans for FCBGA packages. 
  • Experience with system-level reliability assessment of large-body FCBGA packages. 

Additional Assets 

  • Subject-matter expertise in Co-Packaged Optics (CPO) and/or Near-Packaged Optics (NPO). 
  • Deep technical expertise in package and substrate warpage, including characterization, modeling, material interactions, and assembly process impacts. 

Base salary range is $160,000 to $200,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Skills Required

  • Strong experience in FCBGA assembly manufacturing processes and laminate substrate technologies
  • Proven NPI development experience for advanced flip-chip packages through qualification and production release
  • Experience implementing packages from die netlist through flip-chip package design and manufacturing
  • Experience managing substrate suppliers and assembly OSAT partners
  • Strong technical project management skills, including scheduling, milestone management, risk assessment, issue resolution, and cross-functional execution
  • Experience collaborating across Product Engineering, Program Management, Quality, Marketing, Design, and external supplier teams
  • Experience managing customer returns and field quality issues related to semiconductor packaging
  • Experience with root cause analysis, failure analysis, containment, corrective actions, and recurrence prevention
  • Experience with Cadence Allegro Package Designer or equivalent package design tools
  • Strong knowledge of FCBGA reliability mechanisms, test methodologies, and qualification requirements
  • Experience developing and executing FCBGA package qualification plans
  • Experience with system-level reliability assessment of large-body FCBGA packages
  • Subject-matter expertise in Co-Packaged Optics or Near-Packaged Optics
  • Deep technical expertise in package and substrate warpage characterization, modeling, material interactions, and assembly process impacts

Astera Labs Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Astera Labs and has not been reviewed or approved by Astera Labs.

  • Healthcare Strength Health plans are described as competitive and employer-subsidized, covering medical, dental, and vision for employees and dependents. Company materials and listings consistently emphasize strong core healthcare coverage.
  • Leave & Time Off Breadth Flexible time off is highlighted alongside paid company holidays, with guidance indicating generous PTO when coordinated with teams. Documented policies also point to robust time-off structures across locations.
  • Equity Value & Accessibility Stock-based compensation is a meaningful part of total pay, with RSUs and an employee stock purchase plan noted as part of the package. Public-company status enhances perceived value and accessibility of equity components.

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The Company
HQ: San Jose, CA
148 Employees
Year Founded: 2017

What We Do

Astera Labs Inc., a fabless semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center. Partnering with leading processor vendors, cloud service providers, seasoned investors, and world-class manufacturing companies, Astera Labs is helping customers remove performance bottlenecks in data-intensive systems that are limiting the true potential of applications such as artificial intelligence and machine learning. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity.

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