The Role and Impact
Are you ready to make a significant contribution to cutting-edge semiconductor designs? As a DFT Design Engineer, you will play a critical role in shaping the testability, debuggability and reliability of complex SoC (System-on-Chip) designs. You will work closely with cross-functional teams, influencing designs from concept to production, and ensuring our products meet the highest quality standards. In this role, you will develop innovative DFT/DFD methodologies, optimize workflow with AI, and enhance post silicon efficiency. Your work will directly impact Intel's ability to deliver world-class semiconductor solutions that advance technology across industries.
Key Responsibilities :
- Develop and implement advanced DFT methodologies for complex SoC designs to maximize test coverage and efficiency.
- Collaborate with design, verification, and manufacturing teams to define and optimize post silicon strategies and requirements.
- Integrate DFT/DFD features into RTL and ensure verification of design for testability requirements.
- Collaborate with post-silicon teams to debug and validate DFT features.
- Stay current with emerging trends, AI adoption and technologies in DFT/DFD to ensure best practices are incorporated into workflows.
Minimum Qualifications :
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of experience in DFT, SoC design, or related semiconductor design areas.
- Expertise in RTL design using hardware description languages like Verilog, VHDL, or SystemVerilog.
Preferred Qualifications :
- Familiar with AI application.
- Familiarity with advanced DFT methods for low-power or high-performance SoC designs.
- Understanding of industry standards such as IEEE 1687 (IJTAG), 1149.1 (JTAG), or IEEE 1500 (Core Test).
- Advanced knowledge of industry-standard DFT tools such as Synopsys DFT Compiler, Mentor Tessent, or Cadence Modus.
- Knowledge of Python or other scripting languages for design automation.
- Hands-on experience with managing multi-functional teams or complex SoC projects.
We are looking for a visionary DFT engineer who thrives in a collaborative and innovative environment, and who is excited by the opportunity to contribute to groundbreaking technology. Join us to shape the future of computing and leave your mark on the world.
Job Type:Experienced HireShift:Shift 1 (Malaysia)Primary Location: Malaysia, PenangAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 5+ years of experience in DFT, SoC design, or related semiconductor design areas
- Expertise in RTL design using Verilog, VHDL, or SystemVerilog
- Familiar with AI application
- Familiarity with advanced DFT methods for low-power or high-performance SoC designs
- Understanding of IEEE 1687 (IJTAG), IEEE 1149.1 (JTAG), or IEEE 1500 (Core Test)
- Advanced knowledge of DFT tools such as Synopsys DFT Compiler, Mentor Tessent, or Cadence Modus
- Knowledge of Python or other scripting languages for design automation
- Hands-on experience managing multi-functional teams or complex SoC projects
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
Intel Insights
What We Do
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