Staff/Principal ATE Test Engineer

Posted Yesterday
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Torrance, CA, USA
In-Office
160K-200K Annually
Expert/Leader
Fintech • Payments • Financial Services
The Role
Lead test development and production test strategy for IVR semiconductor products. Define wafer probe and final test flows, develop ATE programs and probe/load hardware, optimize test time and multisite architectures, support first-silicon bring-up, characterization, trim/calibration and manufacturing ramp, and collaborate with design, DFT, foundries and OSAT partners to ensure robust, high-volume manufacturable test solutions.
Summary Generated by Built In
About Us

Red Cell Partners is an incubation firm building and investing in rapidly scalable technology-led companies that are bringing revolutionary advancements to market in three distinct practice areas: healthcare, cyber, and national security. United by a shared sense of duty and deep belief in the power of innovation, Red Cell is developing powerful tools and solutions to address our Nation’s most pressing problems.

Staff/Principal ATE Test Engineer 

About The Team

We are open-minded, fast paced, problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking.  Our response is never “no, but….” instead “yes, if….”.  We are mindful of our personal and organizational blinders and try to build an environment where our team members are At Their Best.

Location: Minimum of 3 days a week in the office in Torrance, CA.   

About The Role 

We are seeking a highly experienced Principal ATE Test Engineer to lead test development and production test strategy for a high-performance integrated voltage regulator (IVR) semiconductor product line targeting advanced AI and HPC power delivery applications. 

This role is focused primarily on semiconductor test engineering, spanning DFT collaboration, characterization support, wafer probe, final test, hardware development, production ramp, and manufacturing optimization. The ideal candidate combines deep technical expertise in mixed-signal and power semiconductor test with strong leadership across silicon bring-up and high-volume manufacturing environments. 

The candidate is expected to operate as a senior technical leader capable of driving test strategy independently across internal teams and external manufacturing partners.  

What You Will Do 

  • Define overall manufacturing test strategy for IVR silicon across wafer probe and package final test
  • Develop production screening methodologies for:
  • Analog and mixed-signal circuits
  • Integrated ADCs and telemetry
  • Digital control and state machines
  • PMBus/I2C interfaces
  • OTP/eFuse programming
  • Protection and fault-management circuitry
  • Power-stage functionality and efficiency
  • Partner with Design and DFT teams to ensure robust testability and manufacturability
  • Lead development of wafer sort and final test solutions on production ATE platforms, including:
  • ATE Test programs
  • Probe/load board hardware
  • Calibration methodologies
  • Thermal management approaches
  • Multisite test architectures
  • Drive aggressive test time reduction while maintaining production quality targets.
  • Support transition from engineering characterization flows into scalable high-volume production test
  • Support first-silicon bring-up activities and debug of manufacturing test flows
  • Support trim development, calibration algorithms, and production limit setting
  • Debug silicon, hardware, and software issues observed during characterization and manufacturing ramp 

 

What You Bring 

  • 10+ years in the semiconductor industry, with a proven track record developing manufacturing test solutions for high-volume semiconductor products. 
  • BS/MS in Electrical Engineering or related field
  • Experience with mixed-signal and/or power management IC MFG test development
  • Strong understanding of: 
    • Wafer probe and final test flows
    • Mixed-signal ATE methodologies
    • Yield analysis and characterization
    • Test hardware development
    • Test time optimization
    • OSAT manufacturing flows 
  • Experience with high-volume semiconductor manufacturing environments
  • Strong debugging capability across silicon, hardware, software, and manufacturing domains
  • Experience working with foundries and outsourced manufacturing/test partners
  • Familiarity with PMBus, I2C, telemetry, and power management architectures
  • Experience with Advantest, Teradyne, or Cohu mixed-signal/power ATE platforms
  • Understanding of DFT methodologies for mixed-signal SoCs 

Salary Range: $160k-$200k.  This represents the typical salary range for this position based on experience, skills, and other factors. 

 

Our Red Cell Partners Benefits:

For full-time roles

  • Career track opportunity with potential for rapid advancement with strong performance as the firm grows 
  • 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
  • Paid maternity and paternity for 14 weeks at employees' normal pay.
  • Unlimited PTO, with management approval.
  • Opportunities for professional development and continued learning.
  • Optional 401K, FSA, and equity incentives available.
  • Mental health benefits are available through Tara Mind. 
  • Cost effective GLP-1 solutions available through Crux. 

We’re an Equal Opportunity Employer: You’ll receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, protected veteran status, or on the basis of disability.

Applicant Data Disclosure   

By submitting an application, you acknowledge that Red Cell Partners, LLC ("Red Cell") uses third-party service providers to facilitate its recruitment and hiring processes. These providers include applicant tracking systems, candidate verification platforms, and fraud detection tools (collectively, "Hiring Platforms"). Your application materials, including your résumé, cover letter, work samples, responses to application questions, and any other information you submit, may be transmitted to and processed by these Hiring Platforms for the following purposes:  

  • Managing and administering your application throughout the hiring process; 
  • Verifying the accuracy and authenticity of application materials, including by cross-referencing information you provide against publicly available sources and proprietary databases; 
  • Identifying indicators of potentially fraudulent, fabricated, or materially misleading application content, including but not limited to discrepancies between submitted materials and publicly available professional profiles, geographic anomalies, and fabricated work histories. 

Applications that are flagged through this process as containing indicators of fraud or material misrepresentation may be declined from further consideration. If you have questions about the status of your application or the evaluation process, please contact talent@redcellpartners.com 

Red Cell requires its Hiring Platform providers to process your information solely for the purposes described above and in accordance with applicable law. Your information will be retained only for as long as necessary to fulfill these purposes and any applicable legal obligations, after which it will be deleted in accordance with Red Cell's data retention policies.

For more information about how your data is used, please refer to our Privacy Policy and Applicant Privacy Notice.  

Skills Required

  • 10+ years in the semiconductor industry developing manufacturing test solutions
  • BS or MS in Electrical Engineering or related field
  • Experience with mixed-signal and/or power management IC manufacturing test development
  • Strong understanding of wafer probe and final test flows
  • Experience developing ATE test programs and probe/load board hardware
  • Familiarity with PMBus, I2C, telemetry, and power management architectures
  • Experience with Advantest, Teradyne, or Cohu mixed-signal/power ATE platforms
  • Experience with high-volume semiconductor manufacturing and OSAT flows
  • Strong debugging capability across silicon, hardware, software, and manufacturing domains
  • Understanding of DFT methodologies for mixed-signal SoCs
  • Experience with yield analysis, characterization, test time optimization, and production ramp
  • Ability to work on-site a minimum of 3 days per week in Torrance, CA
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The Company
Los Angeles, California
64 Employees
Year Founded: 2020

What We Do

Red Cell Partners is an incubation firm building rapidly-scalable technology-led companies that are bringing revolutionary advancements to market in three distinct practice areas: healthcare, cyber, and national security. United by a shared sense of duty and deep belief in the power of innovation, Red Cell is developing powerful tools and solutions to address our Nation’s most pressing problems

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