Staff IP Design Engineer

Posted Yesterday
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Penang, Daerah Timor Laut, Penang, MYS
In-Office
Senior level
Semiconductor • Manufacturing
The Role
Lead development of connectivity IP for Lattice FPGAs, translating specifications into high-speed RTL designs. Perform RTL design, logic verification, debug, timing closure, and collaborate on validation, soft IP packaging, example designs, and testbenches while mentoring and enabling engineering teams.
Summary Generated by Built In
Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.
Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.
Responsibilities & Skills We are seeking a Staff IP Design engineer, passionate individual with technical leadership capabilities to build Connectivity IP portfolios for Lattice FPGA. The individual should have the ability to work closely with architect to translate specifications into high-speed RTL design, for the best Performance, Power and logic utilization.
Requirements Key Skills

  • Experience in high speed SERDES and video protocols (e.g.: DisplayPort, HDMI, MIPI, SDI) or Peripherals (SPI, I2C or I3C) is a plus.
  • Hands-on experience in FPGA RTL design, logic verification, debug and timing closure is preferred
  • Programming skills (e.g.: C/C++, Perl, TCL or Python).
  • Experience in hardware validation or hardware interoperability test is a plus.
  • Experience in soft IP packaging, example design and testbench development will be an added advantage.

Education And General

  • BS/MS/PhD in Electronics or Computer Engineering minimum of 8 years of FPGA or system design experience.
  • Independent and self-motivated, capable of executing under dynamic environment and uncertainties
  • Innovative, problem solver who likes to come up with newer and better solutions for existing problems.
  • Individual who works well with a team of diverse engineers, open to feedback and opinions.
  • Able to galvanize and enable a team to execute on a project to completion.

Good communication skill

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Malaysia

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry.  Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. 


Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions.  Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win.  For more information about how our FPGA, CPLD and programmable power management  devices help our customers unlock their innovation, visit 
www.latticesemi.com.  You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.  Applications are welcome from all qualified candidates.

 

Skills Required

  • Minimum of 8 years of FPGA or system design experience with BS/MS/PhD in Electronics or Computer Engineering
  • Hands-on experience in FPGA RTL design, logic verification, debug and timing closure
  • Programming skills in C/C++, Perl, TCL or Python
  • Ability to translate specifications into high-speed RTL design working closely with architects
  • Experience with high-speed SERDES and video protocols (DisplayPort, HDMI, MIPI, SDI) or peripherals (SPI, I2C, I3C)
  • Experience in hardware validation or hardware interoperability test
  • Experience in soft IP packaging, example design and testbench development
  • Strong communication skills; ability to work in and lead diverse engineering teams
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The Company
HQ: Hillsboro, OR
975 Employees
Year Founded: 1983

What We Do

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive and consumer markets. Our technology, long-standing relationships, and commitment to world-class support lets our customers quickly and easily unleash their innovation to create a smart, secure and connected world. Lattice was founded in 1983 and is headquartered in Hillsboro, Oregon with major operations in San Jose, California, Shanghai, China, and Manila, Philippines.

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