This role is for one of the Weekday's clients
Min Experience: 4+ years
Location: Bengaluru
JobType: full-time
Requirements
Roles & Responsibilities
• Perform block-level and full-chip Static Timing Analysis (STA).
• Drive timing closure across all timing modes and corners.
• Analyze and resolve setup and hold violations.
• Work closely with Physical Design teams for timing optimization.
• Generate and review timing constraints (SDC).
• Perform timing signoff checks, including noise and variation analysis.
• Debug timing issues and provide timing ECO solutions.
• Collaborate with RTL, Synthesis, DFT, and Physical Design teams.
• Ensure timing closure at advanced technology nodes.
Required Skills
• Strong hands-on experience in STA and timing signoff.
• Expertise in setup/hold analysis, timing closure, and ECO implementation.
• Experience with MMMC concepts and timing constraints development.
• Good understanding of synthesis, floorplanning, placement, CTS, routing, and signoff flows.
• Knowledge of SI, Crosstalk, OCV/AOCV/POCV concepts.
• Experience with industry-standard tools such as:
o Synopsys PrimeTime
o PrimeTime SI
o ICC2 (Good to have)
o Tempus (Good to have)
• Strong debugging and problem-solving skills.
• Excellent communication and stakeholder management skills.
Preferred Qualifications
• Experience working on advanced technology nodes (7nm/5nm/3nm preferred).
• Exposure to full-chip timing closure and tape-out activities.
• Experience handling customer interactions and technical reviews.
Cadence
Skills Required
- 4+ years experience in STA or related timing roles
- Hands-on experience in Static Timing Analysis and timing signoff
- Setup and hold analysis, timing closure, and ECO implementation
- Knowledge of MMMC concepts and timing constraints development (SDC)
- Understanding of synthesis, floorplanning, placement, CTS, routing, and signoff flows
- Knowledge of SI, crosstalk, OCV/AOCV/POCV concepts
- Experience with Synopsys PrimeTime and PrimeTime SI
- Collaboration with RTL, Synthesis, DFT, and Physical Design teams
- Strong debugging, problem-solving, and stakeholder communication skills
- Experience with ICC2
- Experience with Tempus
- Experience on advanced technology nodes (7nm/5nm/3nm)
- Exposure to full-chip timing closure and tape-out activities
- Experience handling customer interactions and technical reviews
- Experience with Cadence tools (good-to-have)
What We Do
Weekday is an AI-powered recruitment platform that helps startups hire top-tier engineering and product talent. By leveraging a massive database of white-collar professionals and advanced outreach tools, the company streamlines the hiring process through automated sourcing, AI-driven resume screening, and white-glove contingency services. Their mission is to modernize recruitment by enabling companies to discover and engage passive candidates efficiently, ensuring high-quality hires for critical roles.
