Our Team:
Semtech’s Force and Haptic team specialize in force sensor AFEs, integrated force sensors, and haptic drivers. With a strong track record of innovation and global collaboration, the team plays a critical role in delivering industry-leading IC products.
Responsibilities:
Lead the design and development of high-accuracy analog and mixed-signal ICs, delivering robust, high-quality designs that meet defined specifications and timelines (55%).
Take ownership of critical chip subsystems and act as technical lead across cross-functional project teams (20%).
Collaborate closely with Marketing, Product Definition, Test, Verification, Reliability, and Product Engineering teams to ensure successful product development (10%).
Drive innovation in circuit design and architecture, introducing new ideas and solutions to improve performance and efficiency (5%).
Mentor and support junior engineers or interns, providing technical guidance and fostering team development (5%).
Communicate complex technical concepts clearly through reports and presentations to senior stakeholders (5%).
Minimum Qualifications:
Bachelor’s degree in electrical, electronics, or related Engineering field with 12+ years’ experience in analog IC design within the semiconductor industry.
Deep understanding of CMOS/BiCMOS analog circuit design practices.
Proven experience as a technical lead on chip development projects.
Strong mixed-signal design experience.
Expert proficiency with Cadence design environment, simulation, and verification tools.
Expert proficiency with device modelling (Verilog-AMS, SystemVerilog) and mixed-signal simulation.
Understanding of design for manufacturability (DFM), reliability, and yield optimization.
Solid understanding of mixed-signal design, including parasitic, matching, ESD, latch up, crosstalk, and IR drop.
Experience in chip top level verification and production experience is a plus
Documentation of design results, characterization results and DFMEA
Experience in translating MEMS models into equivalent circuits
Demonstrated innovation and creative problem-solving capabilities.
Analog block and full chip level schematic design, process corner analysis, and post-layout simulation
Block level verification including LVS/DRC/PEX
Fluent in written and spoken English
Desired Qualifications
Postgraduate qualification (MSc or PhD) in a relevant field.
Experience with circuit design in mixed-signal design.
Experience with mixed-signal lab validation techniques and equipment.
Experience in translating haptic actuators model into equivalent circuits is a plus
Familiarity with high voltage and high current ASIC design.
Skills Required
- Bachelor's degree in electrical engineering, electronics engineering, or a related engineering field
- 12 or more years of analog IC design experience in the semiconductor industry
- Deep understanding of CMOS and BiCMOS analog circuit design
- Experience serving as a technical lead on chip development projects
- Strong mixed-signal IC design experience
- Expert proficiency with Cadence design, simulation, and verification tools
- Expert proficiency with Verilog-AMS, SystemVerilog, device modeling, and mixed-signal simulation
- Understanding of design for manufacturability, reliability, and yield optimization
- Understanding of parasitics, matching, ESD, latch-up, crosstalk, and IR drop in mixed-signal designs
- Experience documenting design results, characterization results, and DFMEA
- Experience translating MEMS models into equivalent circuits
- Analog block- and full-chip-level schematic design, process-corner analysis, and post-layout simulation experience
- Block-level verification experience including LVS, DRC, and PEX
- Fluency in written and spoken English
- Experience with chip top-level verification and production
- Postgraduate qualification such as an MSc or PhD in a relevant field
- Experience with mixed-signal laboratory validation techniques and equipment
- Experience translating haptic actuator models into equivalent circuits
- Familiarity with high-voltage and high-current ASIC design
Semtech Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Semtech and has not been reviewed or approved by Semtech.
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Parental & Family Support — Up to 20 weeks of paid maternity/parental leave is highlighted in multiple regions. Enhanced leave is positioned as a core part of the package.
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Healthcare Strength — Medical, dental, and vision coverage are standard elements of the offering. Core health coverage features prominently alongside other benefits.
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Leave & Time Off Breadth — Paid vacation and time‑off programs are explicitly included. Time off is emphasized together with flexible/hybrid work policies where possible.
Semtech Insights
What We Do
Semtech Corporation is a high-performance semiconductor, IoT systems and Cloud connectivity service provider dedicated to delivering high quality technology solutions that enable a smarter, more connected and sustainable planet.
