About the Company:
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.
We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change – we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.
Position Overview
We are looking for a highly motivated ASIC Digital Design engineer with expertise in DFT, Synthesis, Power, and Timing analysis to support our hardware engineering team.
As a member of ASIC implementation team, you are expected to drive automated flows to streamline sign-off for multiple teams, and ensure high quality deliveries to achieve tapeout milestones.
Key Responsibilities
- Extensive experience with Synopsys tool suites, and Siemens Tessent tool suite.
- Responsible for top-level DFT planning and integration.
- Managing the ATPG (Automatic Test Pattern Generation) and ATE (Automated Test Equipment) interface, including ATE bring-up and failure analysis.
- Driving test time reduction strategies.
- Leading Synthesis , Formality, Timing checks, provide guidance, interface with RTL design team for quality RTL delivery.
- Full chip and Block constraints development & STA; Working independently with the PNR & RTL design team on Physical implementation & Power-intent requirements.
- Power & IR analysis; implementing DFT across multi-power domain designs.
- Troubleshooting Synthesis / Timing / DFT / Power related issues, continuously driving flow improvements.
- Help maintain scripts, documentation, IP DK, and SoC signoff checklists.
Required Qualifications
- Demonstrate expertise in multiple Tapeouts, Extensive experience in frontend tools such as PT, DC, VCLP, Formality, LEC, PrimeClosure, PrimePower, VCS, VC-spyglass-dft, Tetramax, Tessent, etc.
- Low-Power Design flow with UPF.
- Familiarity with UNIX/Linux environments, tcl/perl/python/shell scripting, AI-assisted flow experience is a plus.
- Strong attention to detail and ability to follow structured workflows.
- Bachelors in Engineering and 8+ years of related experience, or Masters degree in Engineering and 6+ years of related experience.
Preferred Qualifications
- Direct experience taping out designs in advanced semiconductor technology nodes (e.g., 7nm, 5nm, or below).
- Familiarity with voltage drop analysis.
- Experience with ATE bring-up, failure analysis and yield improvement.
- Experience with CDC/RDC/Lint checks.
- Experience with floorplan / timing-driven placement / clock-tree synthesis / Xtalk analysis.
REGARDING COMPENSATION:
SK hynix memory solutions America Inc. offers you the opportunity to apply your skills to exciting projects while working with innovative teams. Our compensation package is complimented by a generous benefits package including medical, dental, vision, life insurance and a company 401(k) match, as well as cafeteria, onsite gym and much more. If you are motivated by technical challenges, we offer a collaborative work environment that encourages career growth.
The salary offered to a selected candidate will be tailored based on several factors, including the location, job grade, relevant knowledge, skills, and experience. We also take into account the internal equity among our current team members to ensure fairness and competitiveness.
Skills Required
- Multiple tapeouts experience and expertise in frontend tools (PrimeTime, Design Compiler, VCLP, Formality, LEC, PrimeClosure, PrimePower, VCS, VC-SpyGlass-DFT, Tetramax, Tessent)
- Expertise in DFT planning, ATPG management, and ATE interface including ATE bring-up and failure analysis
- Experience with synthesis, Formality/LEC, timing checks, STA, and guiding RTL quality for timing closure
- Power and IR analysis experience, including multi-power-domain designs and UPF low-power design flows
- Familiarity with UNIX/Linux environments and scripting (tcl, perl, python, shell)
- Ability to develop full-chip and block constraints, work with PNR and RTL teams on physical implementation and power-intent
- Troubleshooting experience across Synthesis, Timing, DFT, and Power issues and driving flow improvements
- Bachelor's in Engineering and 8+ years related experience, or Master's in Engineering and 6+ years related experience
- Maintain scripts, documentation, IP DK, and SoC signoff checklists
- Direct experience taping out designs in advanced nodes (7nm, 5nm or below)
- Familiarity with voltage drop analysis, CDC/RDC/Lint checks, floorplan, timing-driven placement, CTS, and Xtalk analysis
- Experience with ATE failure analysis, yield improvement, and test time reduction strategies
- AI-assisted flow experience
SK hynix Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about SK hynix and has not been reviewed or approved by SK hynix.
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Strong & Reliable Incentives — Profit-sharing linked to operating results and the removal of a bonus cap in Korea have produced very large payouts and materially boosted total compensation there. Reporting indicates these incentives have been especially favorable during the AI/HBM upcycle.
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Healthcare Strength — Company materials highlight medical expense support and robust health coverage, and U.S. packages commonly include comprehensive medical, dental, and vision plans. This strengthens the appeal of core benefits alongside cash compensation.
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Parental & Family Support — Programs in Korea include fertility support, extended childcare leave, and education grants for children through university. These family-forward policies expand benefits value beyond salary and bonuses.
SK hynix Insights
What We Do
Semiconductors are essential to all IT products, and its performance often determines the performance of the final products. SK hynix is a global leader in producing semiconductor, such as DRAM, NAND Flash and CMOS Image Sensors. With these technology driven semiconductor products, SK hynix has consistently led the industry and is now the second largest memory chip maker worldwide. IT devices become more pervasive as new imaginative and innovative IT products continue to grab imagination and desires of consumers. SK hynix has enhanced its competency with the best level of technology and a wide range of business portfolios in order to satisfy all those demand from customers. As a member of SK Group*, SK hynix is aiming at becoming the world’s best semiconductor company. SK hynix America Inc. operates as a subsidiary of SK Hynix Inc. *SK Group is one of South Korea's top five industrial conglomerates. It has about 40 affiliated companies, ranging from energy, telecommunications, finance, to construction.
