The Role
Lead DFT architecture and implementation for MCU SoCs: insert and simulate DFT instruments, generate and verify test patterns, collaborate with SOC, BE, DV and test teams, and mentor junior DFT engineers.
Summary Generated by Built In
About the Position:
As a Pune MCU team DFT lead, this candidate needs to architect DFT design, in charge of DFT instruments insertion and simulation; work with SOC lead/IP designers and DV team to deliver DFT implementations, verify and review verification coverage; work with BE lead for DFT modes STA, IR drop analysis; work with test engineers to bring up test patterns on silicon; provide guidance to Jr. DFT Engineers.Minimum qualifications
As a Pune MCU team DFT lead, this candidate needs to architect DFT design, in charge of DFT instruments insertion and simulation; work with SOC lead/IP designers and DV team to deliver DFT implementations, verify and review verification coverage; work with BE lead for DFT modes STA, IR drop analysis; work with test engineers to bring up test patterns on silicon; provide guidance to Jr. DFT Engineers.Minimum qualifications
- BE/MS degree in Electronics/Electrical/Computer Engineering with 12+ years of DFT experience
- Hands-on expertise with Mentor/Synopsys test generation tools for large complex designs
- DFT lead experience for complex SOC TO and Production
- Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST, LBIST, SSN
- Experience with synthesis, STA and back-end implementation flows
- Familiar with Tessent shell flow for DFT instruments insertion include MBIST, IJTAG, SSN, BSCAN, OCC etc
- Solid Lab and test floor bring-up and debug experience
- Yield estimation and test optimization
- DFT AI mindset
- Define and implement DFT structure, design and methodologies that include scan/mbist/jtag and functional testing
- Create test vectors or oversee their creation
- Collaborate with physical design team to close timing in DFT mode
- Sign-off DFT requirements are being met
- work with testing team to bring-up test patterns on silicon
More information about NXP in India...
#LI-7013Top Skills
Atpg
Bscan
Ieee 1500
Ijtag
Jtag
Lbist
Mbist
Mentor
Occ
Scan Compression
Ssn
Sta
Synopsys
Synthesis
Tessent
Test Pattern Translation
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The Company
What We Do
NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 34,500 employees in more than 30 countries and posted revenue of $13.21 billion in 2022. Find out more at www.nxp.com. Privacy Policy: https://www.nxp.com/company/about-nxp/privacy-policy-for-social-media-pages:PRIVACY-POLICY-SOCIAL-MEDIA
