About Us
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. Our customers are the world’s most innovative companies, delivering extraordinary electronic products—from chips to boards to systems—for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health. Join us and be part of a culture that values innovation, collaboration, and customer success.
Position Overview
Join our growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY IP products across a wide range of customers. This is a tremendous opportunity to work with an experienced team focused on the development and support of high-performance IP related to memory protocols such as DDR, LPDDR, HBM, and GDDR, and to engage with top technology companies making an impact in our world.
We are seeking a Post Silicon Memory Product Engineer to support silicon bring-up, debug, and production ramp for advanced memory IP solutions. This role is critical in ensuring successful integration of Memory PHY and Controller IP into customer systems.
Key Responsibilities
- Serve as the primary technical contact for post-silicon bring-up and debug of Memory IP subsystems.
- Support customer SOC and system integration, including ATE deployment and production ramp.
- Collaborate with internal teams (Analog/Digital Design, DV, Program Management) to resolve technical issues.
- Participate in silicon evaluations, demos, and onsite bring-up for tier-one customers. Travel requirements : Approximately 10%
- Provide integration training and recommendations to customers.
- Analyze and resolve complex subsystem application or implementation issues.
- Contribute to documentation, checklists, and collateral improvements for enhanced customer experience.
- Leverage AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables. Apply AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets.
Required Qualifications
- M.S. in Electrical/Computer Engineering (or similar) with 7+ years of experience, or Ph.D. with 5+ years of relevant experience.
- Strong background in post-silicon bring-up and debug.
- Experience working with DDR5/4/3, LPDDR5/4/3, HBM3/4, GDDR6/7 or similar IPs.
- Hands-on experience with lab equipment for reproducing and debugging customer issues.
- Ability to read schematics and participate in SI/PI reviews for customer board/package implementation.
- Excellent problem-solving, presentation, and communication skills.
Preferred / Optional Skills
- Exposure to STA and RTL flows would be beneficial.
- Familiarity with advanced mixed-signal verification and system simulation tools is a plus.
Why Join Us?
- Work on cutting-edge memory technologies impacting next-generation systems.
- Collaborate with global teams and industry-leading customers.
- Competitive compensation and benefits package.
- Opportunities for career growth and technical leadership.
The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.Skills Required
- M.S. in Electrical/Computer Engineering or similar
- 7+ years of experience or Ph.D. with 5+ years of experience
- Strong background in post-silicon bring-up and debug
- Experience with DDR5/4/3, LPDDR5/4/3, HBM3/4, GDDR6/7
- Hands-on experience with lab equipment for debugging
- Ability to read schematics and participate in SI/PI reviews
- Excellent problem-solving, presentation, and communication skills
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
-
Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
-
Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
-
Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
