Sr. Principal FAE – Tensilica IP

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San Jose, CA, USA
In-Office
144K-267K Annually
Cloud • Hardware • Software • Semiconductor
The Role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Tensilica is the #1 DSP IP provider, shipping over 8 billion cores annually in tier one chip and systems companies world-wide. Tensilica is seeing rapid adoption of Xtensa DSPs and processors - Our IP is being widely deployed into the Edge of Intelligent IoT for ML and AI Deep Learning devices such as Vision, Imaging, Speech, Sensors for ADAS, AR/VR and Audio.  Our unique extensible and configurable technology enable our customers to develop highly differentiated designs in energy-efficient and intelligent sensor computing SOCs. 

Join our winning team!  As a Senior Field Applications Engineer in the San Jose Area, you will work closely with our sales, marketing, and engineering teams to proliferate our Processors/DSPs in cutting-edge SOC designs across North America.  You will understand our customer’s technical needs/requirements and will drive technical presales activities to design in our products.  Moreover, as the voice of the customer you will help shape the future direction of Tensilica IP as we develop highly optimized domain-specific embedded platform solutions with best-in-class sensor processing DSP and ML acceleration technology.

Job Responsibilities include the following:

- Drive pre-sales customer discussions and deep evaluations of Tensilica DSP and Processor solutions

- Prepare/Deliver Technical presentations and product demonstrations to promote/position Tensilica products

- Benchmark and Performance Optimization using both SW and Architectural optimization techniques, including the definition of custom instructions to achieve orders-of-magnitude performance gains

- Coordinate and drive marketing/engineering teams to create supporting documents, examples, and benchmarks as proof-points to help secure design wins

- Understand customer requirements and help define new features and evolve product roadmap with marketing teams

- Develop/Mentor/Manage junior AE staff

Qualifications are:

- Detailed knowledge of high-performance DSP/Processor architecture coupled with hands-on Embedded Software (C/C++/Assembly) background is mandatory.  RTL design and EDA/FPGA implementation background is a plus.

- BS/MS degree in engineering and 10+ years of industry experience in engineering roles within Processor/DSP/SOC domains.

- 5+ years customer facing support and project/people management experience.

- Excellent English Verbal/Written skills.

The annual salary range for California is $143,500 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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