Cadence Design Systems

Sr Principal Design Engineer

Reposted 13 Days Ago

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Bangalore, Bengaluru Urban, Karnataka

In-Office

Senior level

Cloud • Hardware • Software • Semiconductor

The Role

The role involves leading VLSI design engineering, overseeing project schedules, and developing complex test benches and verification methodologies.

Summary Generated by Built In

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

12-14 yrs of work experiences in VLSI domain with Master’s/bachelor’s degree in engineering Strong expertise in Verilog, HVL(SV, Specman e) with UVM/OVM/eRM methodology Expertise in assertions development/closure, constraint randomization, functional and code coverages, formal verification Expertise in test-bench development Strong RTL and GLS (w/ or w/o SDF) sim debug skills Should be able to manage project schedule and delivery independently

Should be good in Perl/Tcl scripting and automation

We’re doing work that matters. Help us solve what others can’t.

Top Skills

Assertions

Constraint Randomization

Erm

Formal Verification

Gls

Hvl

Ovm

Perl

Rtl

Specman E

Systemverilog

Tcl

Uvm

Verilog

Vlsi

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The Company

HQ: San Jose, CA

8,216 Employees

Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.