Sr Engineer - Die Design Engineering APTD

Our vision is to transform how the world uses information to enrich life for all .
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Key Responsibilities
TSV & 3D Integration
∙ Define TSV placement strategy considering keep-out zones, stress-aware layout, CMP density, and wafer thinning constraints
∙ Oversee micro-bump array design, landing pad rules, and RDL routing in coordination with packaging engineering
∙ Ensure die design supports reliable thermo-compression bonding (TCB) and underfill processes through DFM-aware layout decisions
∙ Collaborate with process integration teams on TSV reveal, backside RDL, and hybrid bonding design requirements as technology evolves
Multi-Functional Team Collaboration
∙ Serve as the primary technical interface between die design team and packaging, process integration, test, reliability, and product engineering teams
∙ Work closely with failure analysis teams to support root cause investigation of layout-related yield or reliability excursions
Technology Roadmap & Innovation
Know the latest evolving HBM standards (JEDEC HBM3, HBM3E, and beyond) and translate new requirements into die develop methodology updates
∙ Evaluate and adopt new EDA tools, design methodologies, and layout automation techniques to improve team efficiency and design quality
∙ Contribute to advanced packaging technology roadmap discussions including hybrid bonding, chiplet integration, and next-generation interconnect scaling
∙ Drive IP reuse, layout template standardization, and design kit development to accelerate future program execution
Required Qualifications
Education
∙ Masters or PhD degree in Electrical Engineering, Computer Engineering, or related field required
Experience
∙ 5+ years of experience in die design and physical layout engineering
∙ Direct hands-on experience with HBM, 3D-IC, or advanced packaging programs (CoWoS, SoIC, FOVEROS, or equivalent)
∙ Proven experience with TSV-based die design including KOZ management, micro-bump layout, and backside RDL
Technical Skills
∙ Deep expertise in physical design and layout using industry-standard EDA tools (Cadence Virtuoso, Innovus, Mentor Calibre, Synopsys IC Compiler)
∙ Strong knowledge of DRC/LVS/ERC sign-off flows and foundry PDK rule interpretation
∙ Solid understanding of TSV design rules, stress modeling implications, and 3D integration layout constraints
∙ Working knowledge of DFT structures relevant to advanced packaging: daisy chains, BIST, boundary scan, IEEE P1838
∙ Familiarity with JEDEC HBM specifications (HBM2E, HBM3, HBM3E)
∙ Understanding of power integrity, signal integrity, and thermal considerations at the die-package interface
Experience with parasitic extraction and optimization passionate about physical compose for high-speed memory interfaces
Preferred Qualifications
∙ Experience with hybrid bonding or direct bond interconnect (DBI) die design constraints
∙ Familiarity with chiplet architecture and disaggregated die design for heterogeneous integration
∙ Knowledge of HBM assembly (TCB, underfill, wafer thinning)
∙ Experience with layout automation scripting (Skill, Python, Tcl) for template generation and DRC waiver management
∙ Exposure to reliability physics relevant to advanced packaging: electromigration, stress voiding, thermo-mechanical effects
∙ Published work or patents in advanced packaging, 3D-IC design, or memory interface design
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities - from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
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