Sr. ASIC EDA Workflow Engineer

Reposted 9 Days Ago
Be an Early Applicant
Sunnyvale, CA, USA
In-Office
Senior level
Artificial Intelligence • Software • Generative AI
The Role
Lead EDA tools and DevOps systems for ASIC chip design at Tensordyne, focusing on enhancing EDA workflows and technical support for a global engineering team.
Summary Generated by Built In

About our company - Tensordyne (formerly Recogni)

Artificial intelligence (AI) is transforming our world. It can perform cognitive functions that previously only humans could do, such as perceiving interactions across different modalities and environments - with the ability to quickly learn and then solve complex problems. Tensordyne is an AI system solution company that builds very high-performance, low-power generative AI inference systems. Our mission, through the creation of custom silicon, hardware and software, is to enable multimodal Generative AI inference acceleration at scale, with safe, sustainable, high-performance systems for our hyperscaler and neocloud data center customers. We are at the leading edge of advancing the latest research and product improvements for generative Al inference solutions that will make Al even more advantageous for compelling new generative AI applications.Tensordyne is a well funded, fast-paced startup company with headquarters in both Sunnyvale, CA, and Munich, Germany. We also have many talented team members working remotely across North America and Europe. We take care of our people and their families with comprehensive benefits, competitive compensation, flexible spending options, and recognition programs, because building category-defining technology starts with a healthy, supported team. Come join us as we shape the future of multimodal generative artificial intelligence!

The Opportunity:

In this hands-on, technology leadership role, you will lead EDA tool flow management, and associated engineering workflow development for Tensordyne's multimodal generative AI inference acceleration products. As a valued senior member of our ASIC team, you will guide and assist your colleagues to help improve and invent EDA workflows within a fast-paced, agile HPC development environment that utilizes EDA tools from external companies like Cadence and as well as internally developed workflows. You will drive Tensordyne’s optimization, implementation and exploration of new EDA tools and technologies for the full ASIC chip design process. Your contributions will continuously innovate and improve scalable, reliable, high-performance systems and tools to enable the next generation of Tensordyne products. This is a hands-on role that’s ideal for ASIC EDA experts who have a multi-disciplinary engineering/DevOps background, along with a keen interest in generative AI, and a passion for designing, debugging, optimizing and finding creative EDA solutions to complex technical challenges. In this role, you will work very closely with your ASIC team members who are engaged in the design and verification of Tensordyne products, to understand and improve their workflows and EDA needs.

What you’ll bring:

  • Experience leading the development and support for compilation, build automation, testing, packaging and installation project generators that build object files like either CMake, GNU make, and/or Ninja, as well as experience with CI/CD and modern Git Branching workflows. 
  • Hands-on ASIC engineering experience, that includes knowledge of VLSI/SoC chip design and verification workflows, with ASIC EDA tool suites from Synopsys and/or Cadence.
  • Knowledge of Linux system administration and familiarity with cloud-based devops, with experience in supporting EDA tools .
  • Programming and debugging skills with key languages to automate tasks and improve efficiency using scripts. 
  • Prior work experience with supporting ASIC engineers with EDA workflows, including installation of new tool versions, FlexLM license management, and debugging/fixing issues with EDA vendors.
  • Excellent analytical, written, and verbal interpersonal skills along with an ability to productively collaborate within a global engineering team that moves at a startup pace.
  • Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering or a related technical field.

Tensordyne's culture was built on the following values:

  • Put people first. We only succeed when our people succeed.
  • Ethics and integrity always; Being open, honest, and respectful of everyone.
  • Think Big. Be ambitious and have audacious goals.
  • Aim for excellence. Quality and excellence count in everything we do.
  • Own it and get it done. Results matter!
  • Make each person better together, than they would be as an individual.
  • Embrace each others’ differences, and embrace that there will be differences.

Tensordyne is an equal opportunity employer. We believe that a diverse team is better at tackling complex problems and coming up with innovative solutions. All qualified applicants will receive consideration for employment without regard to age, color, gender identity or expression, marital status, national origin, disability, protected veteran status, race, religion, pregnancy, sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.

A note to Recruitment Agencies: Please don’t reach out to Tensordyne employees or leaders about our roles -- we’ve got it covered. We don’t accept unsolicited agency resumes and we are not responsible for any fees related to unsolicited resumes. Thank you for your understanding.



Skills Required

  • 10+ years of Linux system administration
  • Expertise with EDA tools in a cloud environment
  • Experience with CMake, GNU make, and CI/CD
  • Hands-on ASIC engineering experience with VLSI/SoC
  • Programming skills in SystemVerilog and automation languages
  • Experience supporting ASIC engineers in EDA workflows
  • Bachelor's or Master's in Computer Science or related field
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The Company
HQ: Sunnyvale, California
113 Employees

What We Do

Every leap in AI has followed the same pattern: first we made models bigger, then we tailored them, and now we let them think longer. Each step (scaling law) truly adds intelligence. But in the end we land on the same runway: inference, and demand is exploding while power supply lags. We asked: what if the next step isn’t stacking another law on top, but a zeroth law beneath them all. A law that changes AI math. Because after all, AI is math, trillions of multiplies, and multiplication burns watts. Tensordyne uses logarithmic compute to turn multiplies into adds, cutting power at the root. We’ve cast our proprietary logarithmic math into custom silicon, hardware, interconnect, and system software. The result: one integrated system for multimodal GenAI inference designed for Hyperscaler and Neo Cloud data centers. What this means for our customers: With Tensordyne they can run the world’s largest multimodal models for thousands of users, with fewer racks, less power, and lower cost. We’re well-funded and fast-moving, with co-headquarters in Sunnyvale, California and Munich, Germany, and a distributed team across North America and Europe. Join us to change how the world runs Gen AI.

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