SPE Signal Integrity Engineer

Posted Yesterday
Be an Early Applicant
4 Locations
In-Office
134K-249K Annually
Expert/Leader
Big Data • Internet of Things • Software
The Role
Leads signal and power integrity modeling, simulation, package design, and system-level analysis for high-speed DDR memory products. Defines packaging, PCB routing, decoupling, channel, jitter, and SI/PI requirements; correlates simulations with laboratory measurements; supports debugging and product bring-up; collaborates with design, validation, customers, and cross-functional teams to optimize performance.
Summary Generated by Built In
Overview

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Principal Engineer with signal integrity and package design experience to join our Memory Interface Chips BU’s engineering team in John's Creek, Georgia. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.


As an SPE Signal Integrity Engineer, you will be reporting to the VP of Engineering and is a Full Time position. In this highly visible role, you will work within our SI/PI team to work on modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) in the very challenging DDR field with speed up to 12800+ MT/s.

Responsibilities
  • Create SI/PI methodologies and work with the Design and SI teams to do SI/PI study and package design for the latest DDR product portfolio
  • Work with our design team and validation team to define specifications and system design requirements such as packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations and jitter sensitivity analysis
  • Provide guideline to design team based on SI/PI study and simulation and silicon correlation so that our products will have superior SI performance, i.e. best RMT scores
  • Work with our customers to do collaboration to find the optimum SI/PI solution
  • Help the team during debug and bring up in lab if needed
Qualifications
  • Solid background in SI/PI and package design to provide technical leadership to the team
  • Strong interpersonal skill to keep the team motivated and focused
  • MS or PhD in Electrical Engineering with 10+ years of industry experience in which at least a few years with exposure to DDR4/5
  • Prior experience in simulating high speed memory (DDR4, DDR5) and/or SERDES interfaces is required
  • Solid theoretical background and understanding in EM and transmission line theory is a must
  • Strong background and solid understanding of equalization techniques such as FIR/FFE/DFE/CTLE are required
  • Must understand package and PCB design, be able to edit APD/Allegro layout files. Know SI/PI driven BGA assignment methodology and be able to simulate for the trade-offs in the context of a system
  • Extensive experience in correlating simulation results with lab measurements using scopes, TDRs, VNAs etc.
  • Strong understanding of the server system, from CPUs to DRAMs on DIMM modules, is highly desirable
  • Know the mechanisms of crosstalk and jitter in source-synchronous interfaces and be able to include the effect of such losses into low BER simulations
  • Proficient with simulations using Spice and ADS
  • Experience with commercial EDA tools such as ADS, HFSS, Q3D/PowerSI
  • Familiarity with RedHawk/Totem or XcitePI and Virtuoso is a strong plus
  • Lab characterization experience of passive components, link margin, or noise using real time/sampling scopes and VNA/TDR is a big plus
  • Basic knowledge of circuits used in high-speed link design is preferred.
  • Excellent writing and presentation skills are essential as well as good communication skills to work with customers and cross-functional teams.
  • Must be an innovative, self-motivated individual, be able to manage and drive his projects, and must be a team player

About Rambus


With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.


Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership. The US- John's Creek, GA salary range for this full-time position is $133,900 to $248,700.  Our salary ranges are determined by role, level and location.  The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.


Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.


For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.


#LI-GL1

#LIF-GL

Skills Required

  • MS or PhD in Electrical Engineering
  • 10+ years of industry experience
  • Several years of exposure to DDR4/DDR5
  • Experience simulating high-speed memory or SERDES interfaces
  • Strong SI/PI and package design background
  • Understanding of electromagnetic and transmission line theory
  • Understanding of equalization techniques including FIR, FFE, DFE, and CTLE
  • Understanding of package and PCB design
  • Ability to edit APD and Allegro layout files
  • Knowledge of SI/PI-driven BGA assignment methodology and system trade-off simulation
  • Experience correlating simulation results with laboratory measurements using oscilloscopes, TDRs, or VNAs
  • Understanding of server systems including CPUs, DRAMs, and DIMM modules
  • Understanding of crosstalk and jitter in source-synchronous interfaces and low-BER simulation
  • Proficiency with SPICE and ADS simulations
  • Experience with commercial EDA tools such as ADS, HFSS, Q3D, or PowerSI
  • Familiarity with RedHawk, Totem, XcitePI, or Virtuoso
  • Lab characterization experience with passive components, link margin, or noise using scopes, VNAs, or TDRs
  • Basic knowledge of circuits used in high-speed link design
  • Excellent writing, presentation, and communication skills
  • Ability to manage and drive projects independently and work effectively on a team
Am I A Good Fit?
beta
Get Personalized Job Insights.
Our AI-powered fit analysis compares your resume with a job listing so you know if your skills & experience align.

The Company
HQ: San Jose, CA
989 Employees

What We Do

Dedicated to making data faster and safer, Rambus creates innovative hardware, software and services that drive technology advancements from the data center to the mobile edge. Our architecture licenses, IP cores, chips, software, and services span memory and interfaces, security, and emerging technologies to positively impact the modern world. We collaborate with the industry, partnering with leading chip and system designers, foundries, and service providers. Integrated into tens of billions of devices and systems, our products and technologies power and secure diverse applications, including Big Data, Internet of Things (IoT) security and much more!

Similar Jobs

Ericsson Logo Ericsson

Software Architect

Cloud • Information Technology • Internet of Things • Machine Learning • Software • Cybersecurity • Infrastructure as a Service (IaaS)
In-Office
Seoul, KOR
88000 Employees

Datadog Logo Datadog

Customer Success Manager

Artificial Intelligence • Cloud • Security • Software • Cybersecurity
Easy Apply
Hybrid
Seoul, KOR
6500 Employees

Datadog Logo Datadog

Customer Success Manager

Artificial Intelligence • Cloud • Security • Software • Cybersecurity
Easy Apply
Hybrid
Seoul, KOR
6500 Employees

MongoDB Logo MongoDB

Senior Solutions Architect

Big Data • Cloud • Software • Database
Easy Apply
Hybrid
Seoul, KOR
5550 Employees

Similar Companies Hiring

Onshore Thumbnail
Artificial Intelligence • Fintech • Software • Financial Services
New York, New York
60 Employees
Revel Thumbnail
Aerospace • Hardware • Robotics • Software
Marina Del Rey, California
60 Employees
Blee Thumbnail
Artificial Intelligence • Marketing Tech • Software
New York, New York
30 Employees

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account